MCHC908QT2MDWER Freescale Semiconductor, MCHC908QT2MDWER Datasheet - Page 141
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MCHC908QT2MDWER
Manufacturer Part Number
MCHC908QT2MDWER
Description
IC MCU 1.5K FLASH W/ADC 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QY4MDWER.pdf
(184 pages)
Specifications of MCHC908QT2MDWER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
5
Program Memory Size
1.5KB (1.5K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (5.3mm Width), 8-SOP, 8-SOEIAJ
Processor Series
HC08QT
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 4 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Simple monitor commands can access any memory address. In monitor mode, the MCU can execute
code downloaded into RAM by a host computer while most MCU pins retain normal operating mode
functions. All communication between the host computer and the MCU is through the PTA0 pin. A
level-shifting and multiplexing interface is required between PTA0 and the host computer. PTA0 is used
in a wired-OR configuration and requires a pullup resistor.
The monitor code has been updated from previous versions of the monitor code to allow enabling the
internal oscillator to generate the internal clock. This addition, which is enabled when IRQ is held low out
of reset, is intended to support serial communication/programming at 9600 baud in monitor mode by using
the internal oscillator, and the internal oscillator user trim value OSCTRIM (FLASH location $FFC0, if
programmed) to generate the desired internal frequency (3.2 MHz). Since this feature is enabled only
when IRQ is held low out of reset, it cannot be used when the reset vector is programmed (i.e., the value
is not $FFFF) because entry into monitor mode in this case requires V
remain low during this monitor session in order to maintain communication.
Table 15-1
may be entered after a power-on reset (POR) and will allow communication at 9600 baud provided one
of the following sets of conditions is met:
Freescale Semiconductor
•
•
•
2
3
5
1 μF
1 μF
DB9
If $FFFE and $FFFF do not contain $FF (programmed state):
–
–
If $FFFE and $FFFF contain $FF (erased state):
–
–
If $FFFE and $FFFF contain $FF (erased state):
–
The external clock is 9.8304 MHz
IRQ = V
The external clock is 9.8304 MHz
IRQ = V
IRQ = V
+
+
shows the pin conditions for entering monitor mode. As specified in the table, monitor mode
1
3
4
5
7
8
C1+
C1–
C2+
C2–
Figure 15-12. Monitor Mode Circuit (Internal Clock, No High Voltage)
TST
DD
SS
MAX232
(internal oscillator is selected, no external clock required)
(this can be implemented through the internal IRQ pullup)
V+
V–
16
15
2
10
6
1 μF
9
MC68HC908QY/QT Family Data Sheet, Rev. 6
V
DD
+
+
1 μF
2
74HC125
1
+
3
1 μF
74HC125
6
4
10 kΩ
5
V
DD
10 kΩ
*
* Value not critical
N.C.
N.C.
RST (PTA3)
OSC1 (PTA5)
IRQ (PTA2)
PTA0
TST
on IRQ. The IRQ pin must
Monitor Module (MON)
PTA1
PTA4
V
V
DD
SS
V
N.C.
N.C.
DD
0.1 μF
141
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