MC908QY4AMDWE Freescale Semiconductor, MC908QY4AMDWE Datasheet - Page 57
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC908QY4AMDWE
Manufacturer Part Number
MC908QY4AMDWE
Description
IC MCU 8BIT 4K FLASH 16-SOIC
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908QT1ACDWE.pdf
(200 pages)
Specifications of MC908QY4AMDWE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, PWM
Number Of I /o
13
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
16-SOIC (0.300", 7.5mm Width)
Processor Series
HC08QY
Core
HC08
Data Bus Width
8 bit
Data Ram Size
128 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
13
Number Of Timers
2
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68CBL05AE, DEMO908QB8, DEMO908QC16
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Chapter 5
Configuration Register (CONFIG)
5.1 Introduction
This section describes the configuration registers (CONFIG1 and CONFIG2). The configuration registers
enable or disable the following options:
5.2 Functional Description
The configuration registers are used in the initialization of various options. The configuration registers can
be written once after each reset. Most of the configuration register bits are cleared during reset. Since the
various options affect the operation of the microcontroller unit (MCU) it is recommended that this register
be written immediately after reset. The configuration registers are located at $001E and $001F, and may
be read at anytime.
Freescale Semiconductor
•
•
•
•
•
•
•
•
•
•
Stop mode recovery time (32 × BUSCLKX4 cycles or 4096 × BUSCLKX4 cycles)
STOP instruction
Computer operating properly module (COP)
COP reset period (COPRS): 8176 × BUSCLKX4 or 262,128 × BUSCLKX4
Low-voltage inhibit (LVI) enable and trip voltage selection
Auto wakeup timeout period
Allow clock source to remain enabled in STOP
Enable IRQ pin
Disable IRQ pin pullup device
Enable RST pin
Reset:
Read:
Write:
POR:
The CONFIG registers are one-time writable by the user after each reset.
Upon a reset, the CONFIG registers default to predetermined settings as
shown in
IRQPUD
Bit 7
R
0
0
Figure 5-1
= Reserved
Figure 5-1. Configuration Register 2 (CONFIG2)
IRQEN
6
0
0
MC68HC908QYA/QTA Family Data Sheet, Rev. 3
and
R
5
0
0
Figure
U = Unaffected
5-2.
R
4
0
0
NOTE
R
3
0
0
R
2
0
0
OSCENINSTOP
1
0
0
RSTEN
Bit 0
U
0
57
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