MC9S08SH16CTGR Freescale Semiconductor, MC9S08SH16CTGR Datasheet - Page 92
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MC9S08SH16CTGR
Manufacturer Part Number
MC9S08SH16CTGR
Description
MCU 8BIT 16K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08SH16CTG.pdf
(328 pages)
Specifications of MC9S08SH16CTGR
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Package
16TSSOP
Family Name
HCS08
Maximum Speed
40 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
13
Interface Type
SCI/SPI
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Chapter 6 Parallel Input/Output Control
6.6.3.5
6.6.3.6
92
PTCDS[7:0]
GNGP[7:1]
Reset:
Reset:
GNGEN
Field
Field
7:0
7:1
0
W
W
R
R
GNGPS7
PTCDS7
Output Drive Strength Selection for Port C Bits — Each of these control bits selects between low and high
output drive for the associated PTC pin. For port C pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port C bit n.
1 High output drive strength selected for port C bit n.
Ganged Output Pin Select Bits— These write-once control bits selects whether the associated pin (see
Table
be controlled by the data, drive strength and slew rate settings for PTCO.
0 Associated pin is not part of the ganged output drive.
1 Associated pin is part of the ganged output drive. Requires GNGEN = 1.
Ganged Output Drive Enable Bit— This write-once control bit selects whether the ganged output drive feature
is enabled.
0 Ganged output drive disabled.
1 Ganged output drive enabled. PTC0 forced to output regardless of the value of PTCDD0 in PTCDD.
Port C Drive Strength Selection Register (PTCDS)
0
Ganged Output Drive Control Register (GNGC)
0
7
7
6-1for pins available) is enabled for ganged output. When GNGEN = 1, all enabled ganged output pins will
Figure 6-23. Drive Strength Selection for Port C Register (PTCDS)
GNGPS6
PTCDS6
Figure 6-24. Ganged Output Drive Control Register (GNGC)
0
0
6
6
Table 6-22. PTCDS Register Field Descriptions
Table 6-23. GNGC Register Field Descriptions
GNGPS5
PTCDS5
MC9S08SH32 Series Data Sheet, Rev. 2
0
0
5
5
PRELIMINARY
GNGPS4
PTCDS4
0
0
4
4
Description
Description
GNGPS3
PTCDS3
3
0
3
0
GNGPS2
PTCDS2
0
0
2
2
GNGPS1
PTCDS1
Freescale Semiconductor
0
0
1
1
PTCDS0
GNGEN
0
0
0
0
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