S9S08SG16E1CTLR Freescale Semiconductor, S9S08SG16E1CTLR Datasheet - Page 148
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S9S08SG16E1CTLR
Manufacturer Part Number
S9S08SG16E1CTLR
Description
IC MCU 8BIT 16KB FLASH 28TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.S9S08SG16E1CTG.pdf
(330 pages)
Specifications of S9S08SG16E1CTLR
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-TSSOP
Processor Series
S08SG
Core
HCS08
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
S9S08SG16E1CTLRTR
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
9.6.2
Several sources of error exist for A/D conversions. These are discussed in the following sections.
9.6.2.1
For proper conversions, the input must be sampled long enough to achieve the proper accuracy. Given the
maximum input resistance of approximately 7kΩ and input capacitance of approximately 5.5 pF, sampling
to within 1/4
8 MHz maximum ADCK frequency) provided the resistance of the external analog source (R
below 5 kΩ.
Higher source resistances or higher-accuracy sampling is possible by setting ADLSMP (to increase the
sample window to 23.5 cycles) or decreasing ADCK frequency to increase sample time.
9.6.2.2
Leakage on the I/O pins can cause conversion error if the external analog source resistance (R
If this error cannot be tolerated by the application, keep R
1/4
9.6.2.3
System noise that occurs during the sample or conversion process can affect the accuracy of the
conversion. The ADC accuracy numbers are guaranteed as specified only if the following conditions are
met:
There are some situations where external system activity causes radiated or conducted noise emissions or
excessive V
wait or stop3 or I/O activity cannot be halted, these recommended actions may reduce the effect of noise
on the accuracy:
148
LSB
•
•
•
•
•
•
•
leakage error (N = 8 in 8-bit mode or 10 in 10-bit mode).
There is a 0.1 μF low-ESR capacitor from V
There is a 0.1 μF low-ESR capacitor from V
If inductive isolation is used from the primary supply, an additional 1 μF capacitor is placed from
V
V
Operate the MCU in wait or stop3 mode before initiating (hardware triggered conversions) or
immediately after initiating (hardware or software triggered conversions) the ADC conversion.
— For software triggered conversions, immediately follow the write to ADCSC1 with a wait
— For stop3 mode operation, select ADACK as the clock source. Operation in stop3 reduces V
There is no I/O switching, input or output, on the MCU during the conversion.
Place a 0.01 μF capacitor (C
noise issues, but affects the sample rate based on the external analog source resistance).
DDA
SSA
instruction or stop instruction.
noise but increases effective conversion time due to stop recovery.
DD
Sources of Error
LSB
Sampling Error
Pin Leakage Error
Noise-Induced Errors
(and V
to V
noise is coupled into the ADC. In these situations, or when the MCU cannot be placed in
(at 10-bit resolution) can be achieved within the minimum sample window (3.5 cycles @
SSA
REFL
.
, if connected) is connected to V
AS
MC9S08SG32 Data Sheet, Rev. 8
) on the selected input channel to V
REFH
DDA
to V
AS
to V
SS
lower than V
at a quiet point in the ground plane.
SSA
REFL
.
.
DDA
REFL
/ (2
or V
N
*I
Freescale Semiconductor
SSA
LEAK
(this improves
) for less than
AS
AS
) is kept
) is high.
DD
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