S9S08SG16E1VTL Freescale Semiconductor, S9S08SG16E1VTL Datasheet - Page 13
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S9S08SG16E1VTL
Manufacturer Part Number
S9S08SG16E1VTL
Description
MCU 16K FLASH 28-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.S9S08SG16E1CTG.pdf
(330 pages)
Specifications of S9S08SG16E1VTL
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-TSSOP
Processor Series
S08SG
Core
HCS08
Data Bus Width
8 bit
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S08SG16E1VTL
Manufacturer:
FREESCALE
Quantity:
20 000
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Section Number
6.5
6.6
7.1
7.2
7.3
7.4
7.5
8.1
8.2
8.3
8.4
Freescale Semiconductor
Pin Behavior in Stop Modes............................................................................................................ 81
Parallel I/O and Pin Control Registers ............................................................................................ 82
Introduction ..................................................................................................................................... 95
Programmer’s Model and CPU Registers ....................................................................................... 96
Addressing Modes........................................................................................................................... 99
Special Operations......................................................................................................................... 101
HCS08 Instruction Set Summary .................................................................................................. 104
Introduction ................................................................................................................................... 115
Features ......................................................................................................................................... 117
Modes of Operation....................................................................................................................... 117
Block Diagram .............................................................................................................................. 117
6.4.2 Edge and Level Sensitivity................................................................................................ 81
6.4.3 Pull-up/Pull-down Resistors ............................................................................................. 81
6.4.4 Pin Interrupt Initialization................................................................................................. 81
6.6.1 Port A Registers ................................................................................................................ 83
6.6.2 Port B Registers ................................................................................................................ 87
6.6.3 Port C Registers ................................................................................................................ 91
7.1.1 Features ............................................................................................................................. 95
7.2.1 Accumulator (A) ............................................................................................................... 96
7.2.2 Index Register (H:X)......................................................................................................... 96
7.2.3 Stack Pointer (SP) ............................................................................................................. 97
7.2.4 Program Counter (PC) ...................................................................................................... 97
7.2.5 Condition Code Register (CCR) ....................................................................................... 97
7.3.1 Inherent Addressing Mode (INH)..................................................................................... 99
7.3.2 Relative Addressing Mode (REL)..................................................................................... 99
7.3.3 Immediate Addressing Mode (IMM)................................................................................ 99
7.3.4 Direct Addressing Mode (DIR) ........................................................................................ 99
7.3.5 Extended Addressing Mode (EXT) ................................................................................ 100
7.3.6 Indexed Addressing Mode .............................................................................................. 100
7.4.1 Reset Sequence ............................................................................................................... 101
7.4.2 Interrupt Sequence .......................................................................................................... 101
7.4.3 Wait Mode Operation...................................................................................................... 102
7.4.4 Stop Mode Operation...................................................................................................... 102
7.4.5 BGND Instruction........................................................................................................... 103
8.1.1 ACMP Configuration Information .................................................................................. 115
8.1.2 ACMP/TPM Configuration Information......................................................................... 115
Analog Comparator 5-V (S08ACMPV3)
Central Processor Unit (S08CPUV3)
MC9S08SG32 Data Sheet, Rev. 8
Chapter 7
Chapter 8
Title
Page
13
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