S9S08SG16E1VTL Freescale Semiconductor, S9S08SG16E1VTL Datasheet - Page 71

• Manufacturer Part Number: S9S08SG16E1VTL
• Description: MCU 16K FLASH 28-TSSOP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of S9S08SG16E1VTL

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 22
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-TSSOP
• Processor Series: S08SG
• Core: HCS08
• Data Bus Width: 8 bit
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

1
5.7.4
This high page register contains bits to configure MCU specific features on the MC9S08SG32 Series
devices.
Freescale Semiconductor
This bit can be written only one time after reset. Additional writes are ignored.
COPCLKS
T2CH1PS
T2CH0PS
T1CH1PS
T1CH0PS
Reset:
COPW
Field
ACIC
7
6
4
3
2
1
0
W
R
COPCLKS
System Options Register 2 (SOPT2)
COP Watchdog Clock Select — This write-once bit selects the clock source of the COP watchdog.
0 Internal 1-kHz clock is source to COP.
1 Bus clock is source to COP.
COP Window — This write-once bit selects the COP operation mode. When set, the 0x55-0xAA write sequence
to the SRS register must occur in the last 25% of the selected period. Any write to the SRS register during the
first 75% of the selected period will reset the MCU.
0 Normal COP operation
1 Window COP operation (only if COPCLKS = 1)
Analog Comparator to Input Capture Enable— This bit connects the output of ACMP to TPM1 input channel 0.
0 ACMP output not connected to TPM1 input channel 0.
1 ACMP output connected to TPM1 input channel 0.
TPM2CH1 Pin Select— This selects the location of the TPM2CH1 pin of the TPM2 module.
0 TPM2CH1 on PTB4.
1 TPM2CH1 on PTA7.
TPM2CH0 Pin Select— This bit selects the location of the TPM2CH0 pin of the TPM2 module.
0 TPM2CH0 on PTA1.
1 TPM2CH0 on PTA6.
TPM1CH1 Pin Select— This bit selects the location of the TPM1CH1 pin of the TPM1 module.
0 TPM1CH1 on PTB5.
1 TPM1CH1 on PTC1.
TPM1CH0 Pin Select— This bit selects the location of the TPM1CH0 pin of the TPM1 module.
0 TPM1CH0 on PTA0.
1 TPM1CH0 on PTC0.
0
7
1
= Unimplemented or Reserved
COPW
0
6
1
Figure 5-5. System Options Register 2 (SOPT2)
Table 5-6. SOPT2 Register Field Descriptions
0
0
5
MC9S08SG32 Data Sheet, Rev. 8
ACIC
0
4
Description
T2CH1PS
Chapter 5 Resets, Interrupts, and General System Control
3
0
T2CH0PS
0
2
T1CH1PS
0
1
T1CH0PS
0
0
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