MC9S08JM16CGT Freescale Semiconductor, MC9S08JM16CGT Datasheet - Page 142

MCU 8BIT 16K FLASH 48-QFN

MC9S08JM16CGT

Manufacturer Part Number
MC9S08JM16CGT
Description
MCU 8BIT 16K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08JM16CGT

Core Processor
HCS08
Core Size
8-Bit
Speed
48MHz
Connectivity
I²C, LIN, SCI, SPI, USB
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
37
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-QFN Exposed Pad
Processor Series
S08JM
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
48 MHz
Number Of Programmable I/os
37
Number Of Timers
2
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMOJM, DEMOJMSKT, DEMOFLEXISJMSD, DEMO9S08JM16
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
Controller Family/series
HCS08
No. Of I/o's
37
Ram Memory Size
1KB
Cpu Speed
48MHz
No. Of Timers
2
Digital Ic Case Style
QFN
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Analog-to-Digital Converter (S08ADC12V1)
If the MODE bits are changed, any data in ADCRH becomes invalid.
10.3.4
ADCRL contains the lower eight bits of the result of a 12-bit or 10-bit conversion, and all eight bits of an
8-bit conversion. This register is updated each time a conversion completes except when automatic
compare is enabled and the compare condition is not met. In 12-bit and 10-bit mode, reading ADCRH
prevents the ADC from transferring subsequent conversion results into the result registers until ADCRL
is read. If ADCRL is not read until the after next conversion is completed, the intermediate conversion
results are lost. In 8-bit mode, there is no interlocking with ADCRH. If the MODE bits are changed, any
data in ADCRL becomes invalid.
10.3.5
In 12-bit mode, the ADCCVH register holds the upper four bits of the 12-bit compare value. When the
compare function is enabled, these bits are compared to the upper four bits of the result following a
conversion in 12-bit mode.
In 10-bit mode, the ADCCVH register holds the upper two bits of the 10-bit compare value (ADCV[9:8]).
These bits are compared to the upper two bits of the result following a conversion in 10-bit mode when the
compare function is enabled.
In 8-bit mode, ADCCVH is not used during compare.
142
Reset:
Reset:
Reset:
W
W
W
R
R
R
Data Result Low Register (ADCRL)
Compare Value High Register (ADCCVH)
ADR7
7
0
0
7
0
7
0
0
Figure 10-7. Compare Value High Register (ADCCVH)
ADR6
Figure 10-5. Data Result High Register (ADCRH)
Figure 10-6. Data Result Low Register (ADCRL)
0
0
0
0
0
6
6
6
MC9S08JM16 Series Data Sheet, Rev. 2
ADR5
0
0
0
0
0
5
5
5
ADR4
0
0
0
0
0
4
4
4
ADCV11
ADR11
ADR3
0
0
0
3
3
3
ADCV10
ADR10
ADR2
0
0
0
2
2
2
ADCV9
ADR9
ADR1
Freescale Semiconductor
0
0
0
1
1
1
ADCV8
ADR8
ADR0
0
0
0
0
0
0

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