C8051F333-GMR Silicon Laboratories Inc, C8051F333-GMR Datasheet - Page 26

• Manufacturer Part Number: C8051F333-GMR
• Description: IC 8051 MCU 4K FLASH 20MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F33xr

Specifications of C8051F333-GMR

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 17
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-QFN
• Processor Series: C8051F3x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 768 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 17
• Number Of Timers: 4
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: KSK-SL-TOOLSTICK, PK51, CA51, A51, ULINK2
• Development Tools By Supplier: C8051F330DK
• Minimum Operating Temperature: - 40 C
• For Use With: 336-1451 - ADAPTER PROGRAM TOOLSTICK F330
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

C8051F330/1/2/3/4/5
1.7.
The C8051F330/2/4 devices include an on-chip 10-bit SAR ADC with a 16-channel differential input multi-
plexer. With a maximum throughput of 200 ksps, the ADC offers true 10-bit linearity with an INL and DNL of
±1 LSB. The ADC system includes a configurable analog multiplexer that selects both positive and nega-
tive ADC inputs. Ports0-1 are available as an ADC inputs; additionally, the on-chip Temperature Sensor
output and the power supply voltage (V
ADC to save power.
Conversions can be started in six ways: a software command, an overflow of Timer 0, 1, 2, or 3, or an
external convert start signal. This flexibility allows the start of conversion to be triggered by software
events, a periodic signal (timer overflows), or external HW signals. Conversion completions are indicated
by a status bit and an interrupt (if enabled). The resulting 10-bit data word is latched into the ADC data
SFRs upon completion of a conversion.
Window compare registers for the ADC data can be configured to interrupt the controller when ADC data is
either within or outside of a specified range. The ADC can monitor a key voltage continuously in back-
ground mode, but not interrupt the controller unless the converted data is within/outside the specified
range.
28
Sensor
Temp
VREF
GND
10-Bit Analog to Digital Converter
P0.0
P0.7
P1.0
P1.7
VDD
P0.0
P0.7
P1.0
P1.7
18-to-1
18-to-1
AMUX
AMUX
Figure 1.14. 10-Bit ADC Block Diagram
AMX0P
AMX0N
DD
) are available as ADC inputs. User firmware may shut down the
Rev. 1.7
(+)
(-)
ADC0CF
ADC
10-Bit
VDD
SAR
ADC0GTH ADC0GTL
ADC0LTH
ADC0CN
ADC0LTL
Conversion
Start
000
001
010
011
100
101
32
AD0WINT
Compare
Window
AD0BUSY (W)
Timer 0 Overflow
Timer 2 Overflow
Timer 1 Overflow
CNVSTR Input
Timer 3 Overflow
Logic