MC9S08SH8CTG Freescale Semiconductor, MC9S08SH8CTG Datasheet - Page 166

IC MCU 8BIT 8K FLASH 16-TSSOP

MC9S08SH8CTG

Manufacturer Part Number
MC9S08SH8CTG
Description
IC MCU 8BIT 8K FLASH 16-TSSOP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet

Specifications of MC9S08SH8CTG

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
13
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
16-TSSOP
Cpu Family
HCS08
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
I2C/SCI/SPI
Total Internal Ram Size
512Byte
# I/os (max)
13
Number Of Timers - General Purpose
1
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
2.7V
On-chip Adc
8-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
16
Package Type
TSSOP
Processor Series
S08SH
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
512 B
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
13
Number Of Timers
3
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08SG32, DEMO9S08SG32AUTO, DEMO9S08SG8, DEMO9S08SG8AUTO, DEMO9S08SH32, DEMO9S08SH8
Minimum Operating Temperature
- 40 C
For Use With
DEMO9S08SH8 - BOARD DEMO FOR MC9S08SH FAM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Compliant

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Chapter 11 Inter-Integrated Circuit (S08IICV2)
11.1.4
Figure 11-2
11.2
This section describes each user-accessible pin signal.
11.2.1
The bidirectional SCL is the serial clock line of the IIC system.
11.2.2
The bidirectional SDA is the serial data line of the IIC system.
11.3
This section consists of the IIC register descriptions in address order.
166
External Signal Description
Register Definition
Block Diagram
SCL — Serial Clock Line
SDA — Serial Data Line
is a block diagram of the IIC.
CTRL_REG
ADDR_DECODE
Control
Address
Clock
Input
Sync
Figure 11-2. IIC Functional Block Diagram
MC9S08SH8 MCU Series Data Sheet, Rev. 3
FREQ_REG
SCL
Arbitration
ADDR_REG
Control
Start
Stop
SDA
STATUS_REG
Interrupt
Compare
Register
Address
In/Out
Data
Shift
DATA_MUX
DATA_REG
Data Bus
Freescale Semiconductor

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