MC9S08AC32MFDE Freescale Semiconductor, MC9S08AC32MFDE Datasheet - Page 179
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MC9S08AC32MFDE
Manufacturer Part Number
MC9S08AC32MFDE
Description
MCU 8BIT 32K FLASH 48-QFN
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheet
1.MC9S08AC60CFJE.pdf
(348 pages)
Specifications of MC9S08AC32MFDE
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
38
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
48-QFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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10.5.10 Clock Mode Requirements
A clock mode is requested by writing to CLKS1:CLKS0 and the actual clock mode is indicated by
CLKST1:CLKST0. Provided minimum conditions are met, the status shown in CLKST1:CLKST0 should
be the same as the requested mode in CLKS1:CLKS0.
CLKST, and ICGOUT. It also shows the conditions for CLKS = CLKST or the reason CLKS ≠ CLKST.
Freescale Semiconductor
(CLKST)
CLKST will not update immediately after a write to CLKS. Several bus cycles are required before CLKST updates to the new
value.
The reference frequency has no effect on ICGOUT in SCM, but the reference frequency is still used in making the comparisons
that determine the DCOS bit
After initial LOCK; will be ICGDCLK/2R during initial locking process and while FLL is re-locking after the MFD bits are changed.
Actual
Mode
SCM
(XX)
FBE
FEE
(00)
(01)
(10)
(11)
FEI
Off
Desired
(CLKS)
Mode
SCM
(XX)
FBE
FBE
FEE
FEE
FBE
FEE
FEE
(10)
(00)
(01)
(10)
(11)
(01)
(11)
(10)
(11)
(11)
FEI
FEI
Off
If a crystal will be used before the next reset, then be sure to set REFS = 1
and CLKS = 1x on the first write to the ICGC1 register. Failure to do so will
result in “locking” REFS = 0 which will prevent the oscillator amplifier
from being enabled until the next reset occurs.
Range
X
X
X
X
X
X
X
X
0
0
0
1
(f
f
f
f
f
ICGIRCLK
ICGIRCLK
ICGIRCLK
Frequency
Reference
f
f
ICGIRCLK
REFERENCE
ICGIRCLK
ICGIRCLK
f
f
ICGERCLK
ICGERCLK
MC9S08AC60 Series Data Sheet, Rev. 2
0
0
0
0
Table 10-9. ICG State Table
/7
/7
/7
/7
/7
/7
(1)
(1)
(1)
2
)
128/f
Comparison
Cycle Time
2/f
8/f
8/f
8/f
8/f
8/f
8/f
NOTE
ICGERCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGIRCLK
ICGERCLK
—
—
—
—
Table 10-9
ICGDCLK/R
ICGERCLK/R
ICGERCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGDCLK/R
ICGOUT
shows the relationship between CLKS,
Chapter 10 Internal Clock Generator (S08ICGV4)
0
0
(2)
3
Conditions
CLKS = CLKST
ERCS = 1 and
ERCS = 1 and
Not switching
from FBE to
DCOS = 1
ERCS = 1
DCOS = 1
DCOS = 1
SCM
—
—
—
—
—
—
—
1
for
DCOS = 0 or
LOCS = 1 &
DCOS = 0
ERCS = 0
ERCS = 0
ERCS = 0
ERCS = 0
ERCS = 1
CLKS1 ≠
Reason
CLKST
—
—
—
—
—
—
179
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