MCR908JL3ECFAE Freescale Semiconductor, MCR908JL3ECFAE Datasheet - Page 35
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MCR908JL3ECFAE
Manufacturer Part Number
MCR908JL3ECFAE
Description
IC MCU 4K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908JK1ECDWE.pdf
(180 pages)
Specifications of MCR908JL3ECFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCR908JL3ECFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Chapter 3
Configuration Registers (CONFIG)
3.1 Introduction
This section describes the configuration registers (CONFIG1 and CONFIG2). The configuration registers
enables or disables the following options:
3.2 Functional Description
The configuration register is used in the initialization of various options. The configuration register can be
written once after each reset. All of the configuration register bits are cleared during reset. Since the
various options affect the operation of the MCU it is recommended that this register be written immediately
after reset. The configuration register is located at $001E and $001F, and may be read at anytime.
3.3 Configuration Register 1 (CONFIG1)
COPRS — COP reset period selection bit
Freescale Semiconductor
•
•
•
•
•
•
1 = COP reset cycle is 8176 × 2OSCOUT
0 = COP reset cycle is 262,128 × 2OSCOUT
Stop mode recovery time (32 × 2OSCOUT cycles or 4096 × 2OSCOUT cycles)
STOP instruction
Computer operating properly module (COP)
COP reset period (COPRS), 8176 × 2OSCOUT or 262,128 × 2OSCOUT
Enable LVI circuit
Select LVI trip voltage
Address:
The CONFIG registers are one-time writable by the user after each reset.
Upon a reset, the CONFIG registers default to predetermined settings as
shown in
Reset:
Read:
Write:
COPRS
$001F
Bit 7
Figure 3-1
R
0
Figure 3-1. Configuration Register 1 (CONFIG1)
= Reserved
MC68HC908JL3E Family Data Sheet, Rev. 4
R
6
0
and
Figure
R
5
0
3-2.
NOTE
LVID
4
0
R
3
0
SSREC
2
0
STOP
1
0
COPD
Bit 0
0
35
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