MCR908JL3ECFAE Freescale Semiconductor, MCR908JL3ECFAE Datasheet - Page 52

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MCR908JL3ECFAE

Manufacturer Part Number
MCR908JL3ECFAE
Description
IC MCU 4K FLASH 8MHZ 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MCR908JL3ECFAE

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Peripherals
LED, LVD, POR, PWM
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 12x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MCR908JL3ECFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
System Integration Module (SIM)
5.3 Reset and System Initialization
The MCU has these reset sources:
All of these resets produce the vector $FFFE–$FFFF ($FEFE–$FEFF in Monitor mode) and assert the
internal reset signal (IRST). IRST causes all registers to be returned to their default values and all
modules to be returned to their reset states.
An internal reset clears the SIM counter (see
the resets sets a corresponding bit in the reset status register (RSR). (See
5.3.1 External Pin Reset
The RST pin circuits include an internal pull-up device. Pulling the asynchronous RST pin low halts all
processing. The PIN bit of the reset status register (RSR) is set as long as RST is held low for a minimum
of 67 2OSCOUT cycles, assuming that the POR was not the source of the reset. See
Figure 5-4
5.3.2 Active Resets from Internal Sources
All internal reset sources actively pull the RST pin low for 32 2OSCOUT cycles to allow resetting of
external peripherals. The internal reset signal IRST continues to be asserted for an additional 32 cycles
(Figure
(See
the SIM forces the RST pin low. The internal reset signal then follows the sequence from the falling edge
of RST shown in
52
Figure
Power-on reset module (POR)
External reset pin (RST)
Computer operating properly module (COP)
Low-voltage inhibit module (LVI)
Illegal opcode
Illegal address
2OSCOUT
5-5). An internal reset can be caused by an illegal address, illegal opcode, COP time-out, or POR.
shows the relative timing.
5-6.) Note that for POR resets, the SIM cycles through 4096 2OSCOUT cycles during which
RST
IAB
Figure
Reset Type
All others
PC
POR
5-5.
MC68HC908JL3E Family Data Sheet, Rev. 4
Figure 5-4. External Reset Timing
Table 5-2. PIN Bit Set Timing
5.4 SIM
Number of Cycles Required to Set PIN
Counter), but an external reset does not. Each of
4163 (4096 + 64 + 3)
67 (64 + 3)
VECT H VECT L
5.7 SIM
Freescale Semiconductor
Table 5-2
Registers.)
for details.

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