MC9S08DV96CLF Freescale Semiconductor, MC9S08DV96CLF Datasheet - Page 11

• Manufacturer Part Number: MC9S08DV96CLF
• Description: MCU 8BIT 96K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08DV96CLF

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: CAN, I²C, LIN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 96KB (96K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: S08DV
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 87
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08DZ60
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 24 Channel
• A/d Bit Size: 12 bit
• A/d Channels Available: 24
• Height: 1.4 mm
• Length: 7 mm
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Width: 7 mm
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Section Number
6.1
6.2
6.3
6.4
6.5
7.1
7.2
7.3
7.4
Freescale Semiconductor
Port Data and Data Direction .........................................................................................................101
Pull-up, Slew Rate, and Drive Strength..........................................................................................102
Pin Interrupts ..................................................................................................................................103
Pin Behavior in Stop Modes...........................................................................................................104
Parallel I/O and Pin Control Registers ...........................................................................................104
Introduction ....................................................................................................................................143
Programmer’s Model and CPU Registers ......................................................................................144
Addressing Modes..........................................................................................................................147
Special Operations..........................................................................................................................149
6.3.1 Edge Only Sensitivity .....................................................................................................103
6.3.2 Edge and Level Sensitivity ..............................................................................................103
6.3.3 Pull-up/Pull-down Resistors ...........................................................................................104
6.3.4 Pin Interrupt Initialization ...............................................................................................104
6.5.1 Port A Registers ..............................................................................................................105
6.5.2 Port B Registers ..............................................................................................................109
6.5.3 Port C Registers ..............................................................................................................113
6.5.4 Port D Registers ..............................................................................................................116
6.5.5 Port E Registers ...............................................................................................................120
6.5.6 Port F Registers ...............................................................................................................123
6.5.7 Port G Registers ..............................................................................................................126
6.5.8 Port H Registers ..............................................................................................................129
6.5.9 Port J Registers ...............................................................................................................132
6.5.10 Port K Registers ..............................................................................................................136
6.5.11 Port L Registers ...............................................................................................................139
7.1.1 Features ...........................................................................................................................143
7.2.1 Accumulator (A) .............................................................................................................144
7.2.2 Index Register (H:X) .......................................................................................................144
7.2.3 Stack Pointer (SP) ...........................................................................................................145
7.2.4 Program Counter (PC) ....................................................................................................145
7.2.5 Condition Code Register (CCR) .....................................................................................145
7.3.1 Inherent Addressing Mode (INH) ...................................................................................147
7.3.2 Relative Addressing Mode (REL) ...................................................................................147
7.3.3 Immediate Addressing Mode (IMM) ..............................................................................147
7.3.4 Direct Addressing Mode (DIR) ......................................................................................148
7.3.5 Extended Addressing Mode (EXT) ................................................................................148
7.3.6 Indexed Addressing Mode ..............................................................................................148
7.4.1 Reset Sequence ...............................................................................................................149
Central Processor Unit (S08CPUV5)
Parallel Input/Output Control
MC9S08DZ128 Series Data Sheet, Rev. 1
Chapter 6
Chapter 7
Title
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