MC9S08DN60AMLF Freescale Semiconductor, MC9S08DN60AMLF Datasheet - Page 51

IC MCU 60K FLASH 2K RAM 48-LQFP

MC9S08DN60AMLF

Manufacturer Part Number
MC9S08DN60AMLF
Description
IC MCU 60K FLASH 2K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08DN60AMLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
48-LQFP
Processor Series
S08DN
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SCI, SPI
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Quantity
Price
Part Number:
MC9S08DN60AMLF
Manufacturer:
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Quantity:
5 210
Part Number:
MC9S08DN60AMLF
Manufacturer:
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Quantity:
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Part Number:
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Quantity:
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program time provided that the conditions above are met. If the next sequential address is the beginning of
a new row, the program time for that byte will be the standard time instead of the burst time. This is because
the high voltage to the array must be disabled and then enabled again. If a new burst command has not been
queued before the current command completes, then the charge pump will be disabled and high voltage
removed from the array.
A flowchart to execute the burst program operation is shown in
Freescale Semiconductor
BURST PROGRAM
FLOW
Figure 4-3. Burst Program Flowchart
MC9S08DN60 Series Data Sheet, Rev 3
YES
TO BUFFER ADDRESS AND DATA
0
WRITE COMMAND TO FCMD
NEW BURST COMMAND?
TO LAUNCH COMMAND
AND CLEAR FCBEF
WRITE 1 TO FCBEF
WRITE TO FCDIV
WRITE TO Flash
CLEAR ERROR
FPVIOL OR
FACCERR?
FACCERR?
FCBEF?
START
FCCF?
DONE
1
NO
NO
1
1
(1)
(2)
Figure
0
0
YES
(2)
before checking FCBEF or FCCF.
(1)
Wait at least four bus cycles
4-3.
after reset.
Required only once
ERROR EXIT
Chapter 4 Memory
51

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