MC9S08DZ96CLF Freescale Semiconductor, MC9S08DZ96CLF Datasheet - Page 60
![MCU 8BIT 96K FLASH 48-LQFP](/photos/37/62/376254/lqfp-48_sml.jpg)
MC9S08DZ96CLF
Manufacturer Part Number
MC9S08DZ96CLF
Description
MCU 8BIT 96K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08DZ96CLF
Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
96KB (96K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
6 KB
Interface Type
CAN/I2C/SPI/UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
87
Number Of Timers
3
Operating Supply Voltage
5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
Minimum Operating Temperature
- 40 C
On-chip Adc
24-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC9S08DZ96CLF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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1
2
3
4
0x18B3
0x18B4 –
0x18BB
0x18BC
0x18BD
0x18BE
0x18BF
0xFFAE
0xFFAF
0xFFB0–
0xFFB7
0xFFB8–
0xFFBC
0xFFBD
0xFFBE
0xFFBF
Chapter 4 Memory
Nonvolatile FLASH registers, shown in
include an 8-byte backdoor key, NVBACKKEY, which can be used to gain access to secure memory
resources. During reset events, the contents of NVPROT and NVOPT in the nonvolatile register area of the
FLASH memory are transferred into corresponding FPROT and FOPT working registers in the high-page
registers to control security and block protection options.
The factory MCG trim value is stored in a nonvolatile location and will be loaded into the MCGTRM and
MCGSC registers after any reset if not in a BDM mode. If in a BDM mode, a default value of 0x80 is
loaded. The internal reference trim values stored in Flash (0xFFAE, 0xFFAF), TRIM and FTRIM, can be
programmed by third party programmers and must be copied into the corresponding MCG registers by
user code to override the factory trim.
Provided the key enable (KEYEN) bit is 1, the 8-byte comparison key can be used to temporarily
disengage memory security. This key mechanism can be accessed only through user code running in secure
memory. (A security key cannot be entered directly through background debug commands.) This security
key can be disabled completely by programming the KEYEN bit to 0. If the security key is disabled, the
only way to disengage security is by mass erasing the FLASH if needed (normally through the background
60
Address
SRR and IDE are both 1s.
The position of RTR differs between extended and standard identifier mapping.
SRR and IDE are both 1s.
The position of RTR differs between extended and standard identifier mapping.
Table 4-4. MSCAN Foreground Receive and Transmit Buffer Layouts — Extended Mapping Shown
CANTIDR3
CANTDSR0 –
CANTDSR7
CANTDLR
CANTTBPR
CANTTSRH
CANTTSRL
Reserved for
storage of FTRIM
Reserved for
storage of
MCGTRM
NVBACKKEY
Reserved
NVPROT
Reserved
NVOPT
Register Name
KEYEN
TSR15
PRIO7
TSR7
Bit 7
DB7
ID6
—
—
—
—
0
Table 4-5. Nonvolatile Register Summary
EPS
MC9S08DZ128 Series Data Sheet, Rev. 1
FNORED EPGMOD
TSR14
PRIO6
TSR6
DB6
ID5
—
—
—
—
6
0
Table
(Sheet 2 of 2)
4-5, are located in the FLASH memory. These registers
TSR13
PRIO5
TSR5
DB5
ID4
—
—
—
—
5
0
8-Byte Comparison Key
TSR12
PRIO4
TSR4
DB4
ID3
—
—
—
—
4
0
0
TRIM
TSR11
PRIO3
DLC3
TSR3
DB3
FPS
ID2
—
—
—
3
0
0
TSR10
PRIO2
DLC2
TSR2
DB2
ID1
—
—
—
2
0
0
Freescale Semiconductor
PRIO1
DLC1
TSR9
TSR1
DB1
ID0
—
—
—
1
0
SEC
FTRIM
PRIO0
FPOP
DLC0
TSR8
TSR0
RTR
Bit 0
DB0
—
—
—
4
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