MC9S08RD32DWE Freescale Semiconductor, MC9S08RD32DWE Datasheet - Page 118

• Manufacturer Part Number: MC9S08RD32DWE
• Description: IC MCU 32K FLASH 2K RAM 28-SOIC
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RD32DWE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 28-SOIC (7.5mm Width)
• Processor Series: S08RD
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08RG60E
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Carrier Modulator Transmitter (CMT) Block Description
8.5.8
When the microcontroller is in active background mode, the CMT temporarily suspends all counting until
the microcontroller returns to normal user mode.
8.6
The following registers control and monitor CMT operation:
8.6.1
The carrier generator data registers contain the primary and secondary high and low values for generating
the carrier output.
118
PH[7:0]
•
•
•
•
Field
7:0
Reset
CMT carrier generator data registers (CMTCGH1, CMTCGL1, CMTCGH2, CMTCGL2)
CMT output control register (CMTOC)
CMT modulator status and control register (CMTMSC)
CMT modulator period data registers (CMTCMD1, CMTCMD2, CMTCMD3, CMTCMD4)
W
CMT Registers and Control Bits
R
Background Mode Operation
Carrier Generator Data Registers (CMTCGH1, CMTCGL1,
CMTCGH2, and CMTCGL2)
u = Unaffected
Primary Carrier High Time Data Values — When selected, these bits contain the number of input clocks
required to generate the carrier high and low time periods. When operating in time mode (see
“Time
Mode”), this register pair and the secondary register pair are alternatively selected under control of the
modulator. The primary carrier high and low time values are unaffected out of reset. These bits must be written
to nonzero values before the carrier generator is enabled to avoid spurious results.
PH7
u
7
Mode”), this register pair is always selected. When operating in FSK mode (see
Figure 8-8. Carrier Generator Data Register High 1(CMTCGH1)
PH6
6
u
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Table 8-3. CMTCGH1 Field Descriptions
PH5
u
5
PH4
4
u
Description
PH3
u
3
PH2
2
u
Freescale Semiconductor
Section 8.5.2.3, “FSK
PH1
u
1
Section 8.5.2.1,
PH0
0
u