C8051F704-GQ Silicon Laboratories Inc, C8051F704-GQ Datasheet - Page 213
![IC 8051 MCU 15K FLASH 48-TQFP](/photos/12/36/123601/c8051f704-gq_sml.jpg)
C8051F704-GQ
Manufacturer Part Number
C8051F704-GQ
Description
IC 8051 MCU 15K FLASH 48-TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F70xr
Specifications of C8051F704-GQ
Program Memory Type
FLASH
Program Memory Size
15KB (15K x 8)
Package / Case
48-TQFP, 48-VQFP
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Cap Sense, POR, PWM, Temp Sensor, WDT
Number Of I /o
39
Eeprom Size
32 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
C8051F7x
Core
8051
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
I2C, SPI, UART
Maximum Clock Frequency
25 MHz
Number Of Programmable I/os
39
Number Of Timers
4 x 16 bit
Operating Supply Voltage
1.8 V to 3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Development Tools By Supplier
C8051F700DK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
336-1635 - DEV KIT FOR C8051F700
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1611
Available stocks
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Price
Company:
Part Number:
C8051F704-GQ
Manufacturer:
SILICON
Quantity:
890
Company:
Part Number:
C8051F704-GQ
Manufacturer:
Silicon Laboratories Inc
Quantity:
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29.2. 32-bit CRC Algorithm
The C8051F70x/71x CRC unit calculates the 32-bit CRC using a poly of 0x04C11DB7. The CRC-32 algo-
rithm is "reflected", meaning that all of the input bytes and the final 32-bit output are bit-reversed in the pro-
cessing engine. The following is a description of a simplified CRC algorithm that produces results identical
to the hardware:
1. XOR the least-significant byte of the current CRC result with the input byte. If this is the first iteration of
2. Right-shift the CRC result.
3. If the LSB of the CRC result is set, XOR the CRC result with the reflected polynomial (0xEDB88320).
4. Repeat at Step 2 for the number of input bits (8).
For example, the 32-bit C8051F70x/71x CRC algorithm can be described by the following code:
unsigned long UpdateCRC (unsigned long CRC_acc, unsigned char CRC_input){
}
Table 29.2 lists example input values and the associated outputs using the 32-bit C8051F70x/71x CRC
algorithm (an initial value of 0xFFFFFFFF is used):
the CRC unit, the current CRC result will be the set initial value (0x00000000 or 0xFFFFFFFF).
unsigned char i; // loop counter
#define POLY 0xEDB88320 // bit-reversed version of the poly 0x04C11DB7
// Create the CRC "dividend" for polynomial arithmetic (binary arithmetic
// with no carries)
CRC_acc = CRC_acc ^ CRC_input;
// "Divide" the poly into the dividend using CRC XOR subtraction
// CRC_acc holds the "remainder" of each divide
// Only complete this division for 8 bits since input is 1 byte
for (i = 0; i < 8; i++)
{
}
return CRC_acc; // Return the final remainder (CRC value)
// Check if the MSB is set (if MSB is 1, then the POLY can "divide"
// into the "dividend")
if ((CRC_acc & 0x00000001) == 0x00000001)
{
}
else
{
}
// if so, shift the CRC value, and XOR "subtract" the poly
CRC_acc = CRC_acc >> 1;
CRC_acc ^= POLY;
// if not, just shift the CRC value
CRC_acc = CRC_acc >> 1;
0x00, 0x00, 0xAA, 0xBB, 0xCC
0xAA, 0xBB, 0xCC
Table 29.2. Example 32-bit CRC Outputs
Input
0x63
Rev. 1.0
0x78D129BC
0x41B207B3
0xF9462090
Output
C8051F70x/71x
213
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