MC908GZ32VFAER Freescale Semiconductor, MC908GZ32VFAER Datasheet - Page 205
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MC908GZ32VFAER
Manufacturer Part Number
MC908GZ32VFAER
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GZ60CFJE.pdf
(352 pages)
Specifications of MC908GZ32VFAER
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GZ32VFAER
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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M — Mode (Character Length) Bit
WAKE — Wakeup Condition Bit
ILTY — Idle Line Type Bit
PEN — Parity Enable Bit
PTY — Parity Bit
Freescale Semiconductor
This read/write bit determines whether ESCI characters are eight or nine bits long (See
14-5).The ninth bit can serve as a receiver wakeup signal or as a parity bit. Reset clears the M bit.
This read/write bit determines which condition wakes up the ESCI: a 1 (address mark) in the MSB
position of a received character or an idle condition on the RxD pin. Reset clears the WAKE bit.
This read/write bit determines when the ESCI starts counting 1s as idle character bits. The counting
begins either after the start bit or after the stop bit. If the count begins after the start bit, then a string
of 1s preceding the stop bit may cause false recognition of an idle character. Beginning the count after
the stop bit avoids false idle character recognition, but requires properly synchronized transmissions.
Reset clears the ILTY bit.
This read/write bit enables the ESCI parity function (see
inserts a parity bit in the MSB position (see
This read/write bit determines whether the ESCI generates and checks for odd parity or even parity
(see
1 = 9-bit ESCI characters
0 = 8-bit ESCI characters
1 = Address mark wakeup
0 = Idle line wakeup
1 = Idle character bit count begins after stop bit
0 = Idle character bit count begins after start bit
1 = Parity function enabled
0 = Parity function disabled
1 = Odd parity
0 = Even parity
Table
14-5). Reset clears the PTY bit.
Changing the PTY bit in the middle of a transmission or reception can
generate a parity error.
M
0
1
0
0
1
1
Control Bits
MC68HC908GZ60 • MC68HC908GZ48 • MC68HC908GZ32 Data Sheet, Rev. 6
PEN:PTY
0 X
0 X
1 0
1 1
1 0
1 1
Table 14-5. Character Format Selection
Start Bits
1
1
1
1
1
1
Data Bits
8
9
7
7
8
8
Table
NOTE
Character Format
14-3). Reset clears the PEN bit.
Parity
None
None
Even
Even
Odd
Odd
Table
Stop Bits
14-5). When enabled, the parity function
1
1
1
1
1
1
Character Length
10 bits
11 bits
10 bits
10 bits
11 bits
11 bits
:
Table
I/O Registers
205
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