MC9S08DZ32ACLF Freescale Semiconductor, MC9S08DZ32ACLF Datasheet - Page 142

IC MCU 32K FLASH 2K RAM 48-LQFP

MC9S08DZ32ACLF

Manufacturer Part Number
MC9S08DZ32ACLF
Description
IC MCU 32K FLASH 2K RAM 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS08r
Datasheets

Specifications of MC9S08DZ32ACLF

Core Processor
HCS08
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, I²C, LIN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
39
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
48-LQFP
Processor Series
S08DZ
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
CAN, I2C, SCI, SPI
Number Of Programmable I/os
40
Operating Supply Voltage
5.5 V
Mounting Style
SMD/SMT
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08DZ60
On-chip Adc
12 bit, 16 channel
For Use With
EVB9S08DZ60 - BOARD EVAL FOR 9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Chapter 8 Multi-Purpose Clock Generator (S08MCGV1)
8.3.3
142
Field
TRIM
7:0
Reset:
POR:
W
R
MCG Trim Register (MCGTRM)
MCG Trim Setting — Controls the internal reference clock frequency by controlling the internal reference clock
period. The TRIM bits are binary weighted (i.e., bit 1 will adjust twice as much as bit 0). Increasing the binary
value in TRIM will increase the period, and decreasing the value will decrease the period.
An additional fine trim bit is available in MCGSC as the FTRIM bit.
If a TRIM[7:0] value stored in nonvolatile memory is to be used, it’s the user’s responsibility to copy that value
from the nonvolatile memory location to this register.
U
7
1
Table 8-3. MCG Trim Register Field Descriptions
U
0
6
Figure 8-5. MCG Trim Register (MCGTRM)
MC9S08DZ60 Series Data Sheet, Rev. 4
U
0
5
U
0
4
Description
TRIM
U
0
3
U
0
2
Freescale Semiconductor
U
0
1
U
0
0

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