MCF52254CAF66 Freescale Semiconductor, MCF52254CAF66 Datasheet - Page 5

MCU 32BIT COLDFIRE V2 100LQFP

MCF52254CAF66

Manufacturer Part Number
MCF52254CAF66
Description
MCU 32BIT COLDFIRE V2 100LQFP
Manufacturer
Freescale Semiconductor
Series
MCF5225xr
Datasheet

Specifications of MCF52254CAF66

Core Processor
Coldfire V2
Core Size
32-Bit
Speed
66MHz
Connectivity
CAN, Ethernet, I²C, QSPI, UART/USART, USB OTG
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Processor Series
MCF522x
Core
ColdFire V2
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
I2C/QSPI/UART
Maximum Clock Frequency
66 MHz
Number Of Programmable I/os
56
Number Of Timers
10
Operating Supply Voltage
- 0.3 V to + 4 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
TWR-MCF5225X, TWR-SENSOR-PAK, TWR-SER, TWR-ELEV, TOWER, M52259EVB, M52259DEMOKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 12-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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Family Configurations
5
— Up to 80 MHz processor core frequency
— 40 MHz or 33 MHz peripheral bus frequency
— Sixteen general-purpose, 32-bit data and address registers
— Implements ColdFire ISA_A with extensions to support the user stack pointer register and four new instructions
— Enhanced Multiply-Accumulate (EMAC) unit with four 32-bit accumulators to support 1616  32 or
— Cryptographic Acceleration Unit (CAU)
System debug support
— Real-time trace for determining dynamic execution path
— Background debug mode (BDM) for in-circuit debugging (DEBUG_B+)
— Real-time debug support, with six hardware breakpoints (4 PC, 1 address and 1 data) configurable into a 1- or
On-chip memories
— Up to 64-Kbyte dual-ported SRAM on CPU internal bus, supporting core, DMA, and USB access with standby
— Up to 512 Kbytes of interleaved flash memory supporting 2-1-1-1 accesses
Power management
— Fully static operation with processor sleep and whole chip stop modes
— Rapid response to interrupts from the low-power sleep mode (wake-up feature)
— Clock enable/disable for each peripheral when not used (except backup watchdog timer)
— Software controlled disable of external clock output for low-power consumption
FlexCAN 2.0B module
— Based on and includes all existing features of the Freescale TouCAN module
— Full implementation of the CAN protocol specification version 2.0B
— Flexible message buffers (MBs), totalling up to 16 message buffers of 0–8 byte data length each, configurable as
— Unused MB space can be used as general purpose RAM space
— Listen-only mode capability
— Content-related addressing
— No read/write semaphores
— Three programmable mask registers: global for MBs 0–13, special for MB14, and special for MB15
— Programmable transmit-first scheme: lowest ID or lowest buffer number
— Time stamp based on 16-bit free-running timer
— Global network time, synchronized by a specific message
— Maskable interrupts
Universal Serial Bus On-The-Go (USB OTG) dual-mode host and device controller
— Full-speed / low-speed host controller
— USB 1.1 and 2.0 compliant full-speed / low speed device controller
— 16 bidirectional end points
for improved bit processing (ISA_A+)
3232  48 operations
– Tightly-coupled coprocessor to accelerate software-based encryption and message digest functions
– Support for DES, 3DES, AES, MD5, and SHA-1 algorithms
2-level trigger
power supply support for the first 16 Kbytes
– Standard data and remote frames (up to 109 bits long)
– Extended data and remote frames (up to 127 bits long)
– Zero to eight bytes data length
– Programmable bit rate up to 1 Mbit/sec
Rx or Tx, all supporting standard and extended messages
MCF52259 ColdFire Microcontroller, Rev. 4
Freescale Semiconductor

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