MC9S12XET256MAA Freescale Semiconductor, MC9S12XET256MAA Datasheet - Page 1141

• Manufacturer Part Number: MC9S12XET256MAA
• Description: MCU 16BIT 256K FLASH 80-QFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12XET256MAA

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 50MHz
• Connectivity: CAN, EBI/EMI, I²C, IrDA, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 59
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 12x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 80-QFP
• Processor Series: S12XE
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 16 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 50 MHz
• Number Of Programmable I/os: 59
• Number Of Timers: 25
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, EVB9S12XEP100, DEMO9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• Package: 80PQFP
• Family Name: HCS12X
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 1.8|2.8|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Chapter 29
1024 KByte Flash Module (S12XFTM1024K5V2)
Freescale Semiconductor
Revision
Number
V02.08
V02.09
V02.10
14 Nov 2007
19 Dec 2007
25 Sep 2009
Revision
Date
29.5.2/29-1202
29.4.2/29-1178
29.4.2/29-1178
29.3.2/29-1152
29.1/29-1142
29.4.2.12/29-
29.4.2.12/29-
29.4.2.12/29-
29.4.2.20/29-
29.6/29-1202
29.4.2.8/29-
29.3.2.1/29-
29.4.2.4/29-
29.4.2.7/29-
29.3.2.1/29-
29.4.1.2/29-
Sections
Affected
1184
1154
1181
1183
1187
1187
1187
1196
1154
1173
MC9S12XE-Family Reference Manual , Rev. 1.23
Table 29-1. Revision History
- Changed terminology from ‘word program’ to “Program P-Flash’ in the BDM
unsecuring description,
- Added requirement that user not write any Flash module register during
execution of commands ‘Erase All Blocks’,
Flash’,
- Added statement that security is released upon successful completion of
command ‘Erase All Blocks’,
- Corrected Error Handling table for Full Partition D-Flash, Partition D-Flash,
and EEPROM Emulation Query commands
- Clarify single bit fault correction for P-Flash phrase
- Expand FDIV vs OSCCLK Frequency table
- Add statement concerning code runaway when executing Read Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Program Once
command from Flash block containing associated fields
- Add statement concerning code runaway when executing Verify Backdoor
Access Key command from Flash block containing associated fields
- Relate Key 0 to associated Backdoor Comparison Key address
- Change “power down reset” to “reset”
- Add ACCERR condition for Disable EEPROM Emulation command
The following changes were made to clarify module behavior related to Flash
register access during reset sequence and while Flash commands are active:
- Add caution concerning register writes while command is active
- Writes to FCLKDIV are allowed during reset sequence while CCIF is clear
- Add caution concerning register writes while command is active
- Writes to FCCOBIX, FCCOBHI, FCCOBLO registers are ignored during
reset sequence
Section 29.4.2.11
Section 29.5.2
Description of Changes
Section 29.4.2.8
Section
29.4.2.8, and ‘Unsecure
1141