C8051F044-GQR Silicon Laboratories Inc, C8051F044-GQR Datasheet - Page 27
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C8051F044-GQR
Manufacturer Part Number
C8051F044-GQR
Description
IC 8051 MCU 64K FLASH 100TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F04xr
Specifications of C8051F044-GQR
Core Processor
8051
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
64
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
4.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 13x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
C8051F044-GQR
Manufacturer:
Silicon Laboratories Inc
Quantity:
10 000
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1.2.
The CIP-51 has a standard 8051 program and data address configuration. It includes 256 bytes of data
RAM, with the upper 128 bytes dual-mapped. Indirect addressing accesses the upper 128 bytes of general
purpose RAM, and direct addressing accesses the 128 byte SFR address space. The CIP-51 SFR
address space contains up to 256 SFR Pages. In this way, the CIP-51 MCU can accommodate the many
SFRs required to control and configure the various peripherals featured on the device. The lower
128 bytes of RAM are accessible via direct and indirect addressing. The first 32 bytes are addressable as
four banks of general purpose registers, and the next 16 bytes can be byte addressable or bit addressable.
The CIP-51 in the C8051F04x MCUs additionally has an on-chip 4 kB RAM block and an external memory
interface (EMIF) for accessing off-chip data memory or memory-mapped peripherals. The on-chip 4 byte
block can be addressed over the entire 64 kB external data memory address range (overlapping 4 kB
boundaries). External data memory address space can be mapped to on-chip memory only, off-chip mem-
ory only, or a combination of the two (addresses up to 4 kB directed to on-chip, above 4 kB directed to
EMIF). The EMIF is also configurable for multiplexed or non-multiplexed address/data lines.
The MCU's program memory consists of 64 kB (C8051F040/1/2/3/4/5) or 32 kB (C8051F046/7) of Flash.
This memory may be reprogrammed in-system in 512 byte sectors, and requires no special off-chip pro-
gramming voltage. The 512 bytes from addresses 0xFE00 to 0xFFFF are reserved for the 64 kB devices.
There is also a single 128 byte sector at address 0x10000 to 0x1007F, which may be useful as a small
table for software constants. See Figure 1.7 for the MCU system memory map.
0x1007F
0x1007F
0x10000
0x10000
0xFDFF
0xFE00
0x7FFF
On-Chip Memory
0x0000
0x8000
0x0000
PROGRAM/DATA MEMORY
Programmable in 512
Programmable in 512
C8051F040/1/2/3/4/5
Scrachpad Memory
Scrachpad Memory
Byte Sectors)
C8051F046/7
Byte Sectors)
(DATA only)
RESERVED
(DATA only)
RESERVED
(In-System
(In-System
(FLASH)
64 kB
Flash
32 kB
Flash
Figure 1.7. On-Chip Memory Map
0xFFFF
0x0FFF
0x1000
0x0000
0xFF
0x7F
0x2F
0x1F
0x80
0x30
0x20
0x00
XRAM - 4096 Bytes
(accessable using MOVX
(Indirect Addressing
(Direct and Indirect
Off-chip XRAM space
EXTERNAL DATA ADDRESS SPACE
INTERNAL DATA ADDRESS SPACE
General Purpose
Upper 128 RAM
Bit Addressable
Rev. 1.5
Addressing)
instruction)
Registers
Only)
DATA MEMORY (RAM)
C8051F040/1/2/3/4/5/6/7
(Direct Addressing Only)
Lower 128 RAM
(Direct and Indirect
Addressing)
Special Function
Registers
0
256 SFR Pages
1
2
Up To
3
F
27
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