MC908GP32CBE Freescale Semiconductor, MC908GP32CBE Datasheet - Page 126
![IC MCU 32K FLASH 8MHZ 42-SDIP](/photos/12/39/123977/mc908gp32cbe_sml.jpg)
MC908GP32CBE
Manufacturer Part Number
MC908GP32CBE
Description
IC MCU 32K FLASH 8MHZ 42-SDIP
Manufacturer
Freescale Semiconductor
Series
HC08r
Specifications of MC908GP32CBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
31
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
42-DIP (0.600", 15.24mm)
Controller Family/series
HC08
No. Of I/o's
31
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
1
Embedded Interface Type
I2C, SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GP
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
33
Number Of Timers
4
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GP32CBE
Manufacturer:
Freescale Semiconductor
Quantity:
135
Part Number:
MC908GP32CBE
Manufacturer:
F
Quantity:
20 000
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Input/Output (I/O) Ports
Figure 12-15
When bit DDRDx is a logic 1, reading address $0003 reads the PTDx data latch. When bit DDRDx is a
logic 0, reading address $0003 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
126
PTDPUE Bit
Notes:
1. X = Don’t care
2. Hi-Z = High impedance
3. Writing affects data register, but does not affect input.
4. I/O pin pulled up to V
X
1
0
shows the port D I/O logic.
For those devices packaged in a 40-pin dual in-line package, PTD6 and
PTD7 are not connected. DDRD6 and DDRD7 should be set to a 1 to
configure PTD6 and PTD7 as outputs.
DDRD Bit
0
0
1
READ DDRD ($0007)
WRITE DDRD ($0007)
WRITE PTD ($0003)
READ PTD ($0003)
PTDPUEx
DD
by internal pullup device.
PTD Bit
X
X
X
(1)
Table 12-5. Port D Pin Functions
RESET
Figure 12-15. Port D I/O Circuit
MC68HC908GP32 Data Sheet, Rev. 10
I/O Pin Mode
Input, Hi-Z
Input, V
V
Output
DD
INTERNAL
PULLUP
DEVICE
DD
Table 12-5
(4)
(2)
NOTE
DDRDx
PTDx
Accesses to DDRD
DDRD7–DDRD0
DDRD7–DDRD0
DDRD7–DDRD0
Read/Write
summarizes the operation of the port D pins.
PTD7–PTD0
Read
Pin
Pin
Accesses to PTD
Freescale Semiconductor
PTDx
PTD7–PTD0
PTD7–PTD0
PTD7–PTD0
Write
(3)
(3)
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