MCF5212CAE66 Freescale Semiconductor, MCF5212CAE66 Datasheet

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... Test access/debug port (JTAG, BDM) Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its products. © Freescale Semiconductor, Inc., 2010. All rights reserved. Document Number: MCF5213EC Rev. 4, 6/2010 MCF5213 LQFP– ...

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... QSPI Electrical Specifications . . . . . . . . . . . . . . . . . . . 38 2.16 JTAG and Boundary Scan Timing . . . . . . . . . . . . . . . . 39 2.17 Debug AC Timing Specifications . . . . . . . . . . . . . . . . . 41 3 Mechanical Outline Drawings . . . . . . . . . . . . . . . . . . . . . . . . 42 3.1 64-pin LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . 43 3.2 64 QFN Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 3.3 81 MAPBGA Package . . . . . . . . . . . . . . . . . . . . . . . . . 50 3.4 100-pin LQFP Package . . . . . . . . . . . . . . . . . . . . . . . . 52 4 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... JTAG - IEEE 1149.1 Test Access Port Package 1 FlexCAN is available on the MCF5211 only in the 64 QFN package. 2 The full debug/trace interface is available only on the 100-pin packages. A reduced debug interface is bonded on smaller packages. Freescale Semiconductor Table 1. MCF5213 Family Configurations 5211 • 63 128/16 Kbytes • ...

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... V STBY PLL OCO PIT0 CLKGEN XTAL CLKOUT Figure 1. Block Diagram MCF5213 ColdFire Microcontroller, Rev. 4 GPTn QSPI_DIN, QSPI_DOUT QSPI_CLK, QSPI_CSn UTXDn URXDn QSPI URTSn UCTSn DTINn/DTOUTn DTIM CANRX 3 CANTX PWMn PMM RSTI PORTS CIM (GPIO) RSTO PIT1 GPT PWM Freescale Semiconductor ...

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... Programmable transmit-first scheme: lowest ID or lowest buffer number — Time stamp based on 16-bit free-running timer — Global network time, synchronized by a specific message — Maskable interrupts • Three universal asynchronous/synchronous receiver transmitters (UARTs) Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Family Configurations 5 ...

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... Single 16-bit input pulse accumulator — Toggle-on-overflow feature for pulse-width modulator (PWM) generation — One dual-mode pulse accumulation channel • Pulse-width modulation timer — Operates as eight channels with 8-bit resolution or four channels with 16-bit resolution bus MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... Software-programmable DMA requests for the UARTs (3) and 32-bit timers (4) • Reset — Separate reset in and reset out signals — Seven sources of reset: – Power-on reset (POR) – External – Software – Watchdog – Loss of clock Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Family Configurations 7 ...

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... CPU’s clock rate. The device includes a new debug signal, ALLPST. This signal is the logical AND of the processor status (PST[3:0]) signals and is useful for detecting when the processor halted state (PST[3:0] = 1111). 8 MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... The low voltage detector (LVD) monitors the supply voltage and is configurable to force a reset or interrupt condition if it falls below the LVD trip point. The RAM standby switch provides power to RAM when the supply voltage to the chip falls below the standby battery voltage. Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Family Configurations ...

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... The input clock is further divided by a user-programmable 8-bit prescaler that clocks the actual timer counter register (TCRn). Each of these timers can be configured for input capture or reference (output) compare mode. Timer events may optionally cause interrupt requests or DMA transfers. 10 MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... The direct memory access (DMA) controller provides an efficient way to move blocks of data with minimal processor intervention. It has four channels that allow byte, word, longword, or 16-byte burst line transfers. These transfers are triggered by software explicitly setting a DCRn[START] bit or by the occurrence of certain UART or DMA timer events. Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Family Configurations ...

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... Freescale Part Number MCF5211CAE66 MCF5211 Microcontroller MCF5211CEP66 MCF5211 Microcontroller, FlexCAN MCF5211LCEP66 MCF5211 Microcontroller MCF5211LCVM66 MCF5211 Microcontroller MCF5211LCVM80 MCF5211 Microcontroller MCF5212CAE66 MCF5212 Microcontroller MCF5212LCVM66 MCF5212 Microcontroller MCF5212LCVM80 MCF5212 Microcontroller MCF5213CAF66 MCF5213 Microcontroller, FlexCAN MCF5213CAF80 MCF5213 Microcontroller, FlexCAN MCF5213LCVM66 MCF5213 Microcontroller, FlexCAN MCF5213LCVM80 ...

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... QSPI_CS2 QSPI_DIN 16 QSPI_DOUT 17 QSPI_CLK 18 QSPI_CS1 19 QSPI_CS0 20 RCON Figure 3 shows the pinout configuration for the 81 MAPBGA. Freescale Semiconductor 100 LQFP Figure 2. 100 LQFP Pin Assignments MCF5213 ColdFire Microcontroller, Rev. 4 Family Configurations DDPLL 73 EXTAL 72 XTAL 71 V SSPLL 70 PST3 69 PST2 PST1 65 PST0 64 PSTCLK 63 PWM7 ...

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... CLKMOD1 AN1 PWM3 PWM1 AN0 Figure 3. 81 MAPBGA Pin Assignments MCF5213 ColdFire Microcontroller, Rev TDO TMS V SS TDI V PLL EXTAL DD TCLK V PLL XTAL SS PWM7 GPT3 GPT2 V PWM5 GPT1 DD GPT0 V AN4 STBY AN3 AN5 AN6 V V AN7 SSA DDA SSA Freescale Semiconductor ...

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... Figure 4 shows the pinout configuration for the 64 LQFP and 64 QFN URTS1 TEST UCTS0 URXD0 UTXD0 URTS0 SCL SDA QSPI_DIN QSPI_DOUT QSPI_CLK QSPI_CS0 RCON Figure 4. 64 LQFP and 64 QFN Pin Assignments Freescale Semiconductor 64-Pin Packages MCF5213 ColdFire Microcontroller, Rev. 4 Family Configurations V 48 ...

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Table 4 shows the pin functions by primary and alternate purpose, and illustrates which packages contain each pin. Pin Primary Secondary Group Function Function ADC AN7 — AN6 — AN5 — AN4 — AN3 — AN2 — AN1 — AN0 ...

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Table 4. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Group Function Function Interrupts IRQ7 — IRQ6 — IRQ5 — IRQ4 — IRQ3 — IRQ2 — IRQ1 SYNCA JTAG/BDM JTAG_EN — TCLK/ CLKOUT PSTCLK TDI/DSI — TDO/DSO ...

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Table 4. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Group Function Function 4 QSPI QSPI_DIN/ CANRX EZPD 4 QSPI_DOUT/ CANTX EZPQ QSPI_CLK/ SCL EZPCK QSPI_CS3 SYNCA QSPI_CS2 — QSPI_CS1 — QSPI_CS0 SDA 9 Reset RSTI — ...

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Table 4. Pin Functions by Primary and Alternate Purpose (continued) Pin Primary Secondary Group Function Function UART 1 UCTS1 SYNCA URTS1 SYNCB URXD1 — UTXD1 — UART 2 UCTS2 — URTS2 — URXD2 — UTXD2 — 4,11 FlexCAN CANRX 4,11 ...

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... PLL disabled, clock driven by external oscillator PLL disabled, clock driven by on-chip oscillator PLL disabled, clock driven by crystal PLL in normal mode, clock driven by external oscillator PLL in normal mode, clock driven by on-chip oscillator PLL in normal mode, clock driven by crystal MCF5213 ColdFire Microcontroller, Rev Freescale Semiconductor ...

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... C serial interface module signals. Signal Name Abbreviation Serial Clock SCLn Serial Data SDAn Freescale Semiconductor Table 9. External Interrupt Signals Function External interrupt sources. Function driven on the rising or falling edge of QSPI_CLK. Provides the serial data to the QSPI and can be programmed to be sampled on the rising or falling edge of QSPI_CLK. ...

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... Table 14. ADC Signals Function Inputs to the analog-to-digital converter. Reference voltage high and low inputs Isolate the ADC circuitry from power supply noise. DDA SSA These signals can initiate an analog-to-digital conversion process. MCF5213 ColdFire Microcontroller, Rev — — I Freescale Semiconductor ...

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... TDI Test Data Output TDO Development Serial DSCLK Clock Breakpoint BKPT Freescale Semiconductor Table 15. GPT Signals Function Inputs to or outputs from the general purpose timer module. Table 16. PWM Signals Function Pulse width modulated output for PWM channels. Table 17. Debug Support Signals Function Select between debug module and JTAG signals at reset ...

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... Table 18. EzPort Signal Descriptions Abbreviation Function EZPCK Shift clock for EzPort transfers. EZPCS Chip select for signalling the start and end of serial transfers. EZPD EZPD is sampled on the rising edge of EZPCK. EZPQ EZPQ transitions on the falling edge of EZPCK. MCF5213 ColdFire Microcontroller, Rev Freescale Semiconductor ...

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... VDDPLL, VSSPLL Positive Supply VDD Ground VSS Freescale Semiconductor Table 19. Power and Ground Pins Function Dedicated power supply signals to isolate the sensitive PLL analog circuitry from the normal levels of noise present on the digital power supply. These pins supply positive power to the core logic. ...

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... DD load shunts current greater than maximum injection current. DD MCF5213 ColdFire Microcontroller, Rev Value Unit –0.3 to +4.0 V –0.3 to +4.0 V –0.3 to +4.0 V –0 °C 6 – °C –65 to 150 range during instantaneous and > greater than I , the Freescale Semiconductor ...

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... CLKOUT is already disabled in this instance prior to entering low power mode. 50.00 45.00 40.00 35.00 30.00 25.00 20.00 15.00 10.00 5.00 0. Typical Current Consumption in Low-Power Modes Freescale Semiconductor 3 2 8MHz (Typ) 16MHz (Typ) 64MHz (Typ) 0.13 2.29 2.80 3.08 4.76 2.80 3.08 4.76 11.12 20.23 30 ...

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... N/A N N/A N N/A N/A — — 16 — — 50 should be connected STBY Symbol Value θ 1 θ 1 θ 1,3 42 JMA θ 1,3 33 JMA θ θ Ψ 105 j Freescale Semiconductor Unit mA μA mA μA mA μA Unit ° ° ° ° ° ° ° ...

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... Thermal characterization parameter indicating the temperature difference between package top and the junction temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written in conformance with Psi-JT. Freescale Semiconductor Characteristic Single layer board (1s) Four layer board (2s2p) ...

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... Table 25 3 Symbol Min f 0 sys(R) f 0.15 sys(P/ 3 before failure MCF5213 ColdFire Microcontroller, Rev. 4 and T ( neglected) is I/O (at equilibrium) D Typ Max Unit 1 66. — MHz 1 66. — MHz Symbol Value Unit 2 P/E 10,000 Cycles Retention 10 Years Freescale Semiconductor ...

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... A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification requirements. Complete DC parametric and functional testing is performed per applicable device specification at room temperature followed by hot temperature, unless specified otherwise in the device specification. Freescale Semiconductor Table 26. EzPort Electrical Specifications Characteristic Symbol ...

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... Max 3.0 3.6 DD 1.8 3.6 0.7 × 0.35 × – 0 0.06 × V — HYS DD 2.15 2.3 LVD 60 120 I –1.0 1 – 0.5 — — 0 – 0.5 — — 0 0.5 — — 0.5 OL –10 –130 in — 7 — 7 Freescale Semiconductor Unit μ μA pF ...

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... Based on slow system clock of 40 MHz measured at f 2.9 General Purpose I/O Timing GPIO can be configured for certain pins of the QSPI, DDR Control, timer, UART, and Interrupt interfaces. When in GPIO mode, the timing specification for these pins is given in Freescale Semiconductor Table 29. PLL Electrical Specifications and V = 2 ...

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... CHPOI t PVCH t CHPI Figure 5. GPIO Timing (V = 3 Symbol t RVCH t CHRI t RIVT t CHROV levels unless otherwise noted. DD MCF5213 ColdFire Microcontroller, Rev. 4 Min Max Unit — 1.5 — — ns 1.5 — Min Max Unit 9 — ns 1.5 — — t CYC — Freescale Semiconductor ...

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... Data hold time 3 I5 I2C_SCL/I2C_SDA fall time ( Clock high time 1 I7 Data setup time 1 I8 Start condition setup time (for repeated start condition only Stop condition setup time Freescale Semiconductor Figure Characteristic = Figure Min 6 × × 2 × 0 × ...

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... SSA — DDA 3.3 3.6 V — REFH — 12 Bits ±2.5 ±3 LSB ±2.5 ±3 LSB –1 < DNL < +1 <+1 LSB GUARANTEED — 5.0 MHz — REFH cycles AIC cycles AIC 6 — t cycles AIC 1 — t cycles AIC See Figure 8 — pF Freescale Semiconductor 3 6 ...

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... ADC clock frequency. REF Analog Input Parasitic capacitance due to package, pin-to-pin and pin-to-package base coupling; 1.8pF 2. Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing; 2.04pF Freescale Semiconductor 1 Table 34. ADC Parameters (continued) Min — — — — ...

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... QSPI_DIN to QSPI_CLK (Input hold) The values in Table 36 correspond to Figure 38 (ADC Clock Rate) × (1.4×10 1 Characteristic Characteristic 9. MCF5213 ColdFire Microcontroller, Rev -12 ) Min Max Unit 3 × t — ns CYC 1 × t — ns CYC Min Max Unit 1 510 t CYC — — — — ns Freescale Semiconductor ...

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... J11 TCLK low to TDO data valid J12 TCLK low to TDO high Z J13 TRST assert time J14 TRST setup time (negation) to TCLK high 1 JTAG_EN is expected static signal. Hence not associated with any timing. Freescale Semiconductor QS2 Figure 9. QSPI Timing 1 Symbol f JCYC t JCYC t ...

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... J8 J7 Figure 11. Boundary Scan (JTAG) Timing J9 Input Data Valid J11 Output Data Valid J12 J11 Output Data Valid Figure 12. Test Access Port Timing 14 13 Figure 13. TRST Timing MCF5213 ColdFire Microcontroller, Rev Output Data Valid Output Data Valid V IH J10 Freescale Semiconductor ...

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... CLKOUT high to BKPT high Z 1 DSCLK and DSI are synchronized internally measured from the synchronized DSCLK input relative to the rising edge of CLKOUT. Figure 14 shows real-time trace timing for the values in DDATA[3:0] Freescale Semiconductor Figure Table 38. Debug AC Timing Specification Characteristic Table 38. CLKOUT ...

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... BDM serial port AC timing for the values in CLKOUT DSCLK D3 DSI DSO 3 Mechanical Outline Drawings This section describes the physical properties of the device and its derivatives. 42 Table 38. D5 Current D4 Past Figure 15. BDM Serial Port AC Timing MCF5213 ColdFire Microcontroller, Rev. 4 Next Current Freescale Semiconductor ...

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... LQFP Package Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Mechanical Outline Drawings 43 ...

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... Mechanical Outline Drawings 44 MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Mechanical Outline Drawings 45 ...

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... Mechanical Outline Drawings 3.2 64 QFN Package 46 MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Mechanical Outline Drawings 47 ...

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... Mechanical Outline Drawings 48 MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Mechanical Outline Drawings 49 ...

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... Mechanical Outline Drawings 3.3 81 MAPBGA Package 50 MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Mechanical Outline Drawings 51 ...

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... Mechanical Outline Drawings 3.4 100-pin LQFP Package 52 MCF5213 ColdFire Microcontroller, Rev. 4 Freescale Semiconductor ...

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... Freescale Semiconductor MCF5213 ColdFire Microcontroller, Rev. 4 Mechanical Outline Drawings 53 ...

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... In the “Typical Active Current Consumption Specifications” table (were 0 or values In the “Typical Active Current Consumption Specifications” table (were TBD, and V to the “DC electrical specifications” table. LVD LVDHYS the Max value of V REFL SSA . MCF5213 ColdFire Microcontroller, Rev and the Min value REFL SSA Freescale Semiconductor ...