MCF5233CVM100J Freescale Semiconductor, MCF5233CVM100J Datasheet - Page 37

• Manufacturer Part Number: MCF5233CVM100J
• Description: IC MCU 64K SRAM 100MHZ 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF523xr

Specifications of MCF5233CVM100J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, EBI/EMI, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 61
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF523x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5234-KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

7.9
Table 16
Table 17
Figure 18
Freescale Semiconductor
1
2
3
lists specifications for the I
lists specifications for the I
I
Num
Num
shows timing for the values in
Note: Output numbers depend on the value programmed into the IFDR; an IFDR programmed with
the maximum frequency (IFDR = 0x20) results in minimum output timings as shown in
I
I2C_SCL low period. The actual position is affected by the prescale and division values programmed
into the IFDR; however, the numbers given in
Because I2C_SCL and I2C_SDA are open-collector-type outputs, which the processor can only
actively drive low, the time I2C_SCL or I2C_SDA take to reach a high level depends on external
signal capacitance and pull-up resistor values.
Specified at a nominal 50-pF load.
2
2
I2
I3
I4
I5
I6
I7
I8
I9
I1
C interface is designed to scale the actual data transition time to move it to the middle of the
I1
I2
I3
I4
I5
I6
I7
I8
I9
C Input/Output Timing Specifications
1
1
2
1
3
1
1
1
1
Table 17. I
Table 16. I
Start condition hold time
Clock low period
I2C_SCL/I2C_SDA rise time (V
Data hold time
I2C_SCL/I2C_SDA fall time (V
Clock high time
Data setup time
Start condition setup time (for repeated start condition only)
Stop condition setup time
Start condition hold time
Clock low period
I2C_SCL/I2C_SDA rise time (V
Data hold time
I2C_SCL/I2C_SDA fall time (V
Clock high time
Data setup time
Start condition setup time (for repeated start condition only)
Stop condition setup time
MCF523x Integrated Microprocessor Hardware Specification, Rev. 4
2
2
C Output Timing Specifications between I2C_SCL and I2C_SDA
C Input Timing Specifications between I2C_SCL and I2C_SDA
Characteristic
2
2
Characteristic
C input timing parameters shown in
C output timing parameters shown in
Table 16
IH
IH
IL
IL
= 2.4 V to V
= 2.4 V to V
= 0.5 V to V
= 0.5 V to V
Table 17
and
IL
IL
IH
IH
Table
= 0.5 V)
= 0.5 V)
= 2.4 V)
= 2.4 V)
are minimum values.
17.
Min
10
10
20
10
—
—
6
7
2
Min
—
—
2
Figure
2
8
0
4
0
2
Figure
Max
Max
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
18.
1
1
3
Table
18.
Electrical Characteristics
17. The
Units
Units
t
t
t
t
t
ms
ms
ns
ns
cyc
cyc
cyc
cyc
cyc
t
t
t
t
t
t
t
µs
ns
cyc
cyc
cyc
cyc
cyc
cyc
cyc
37