R5F64185DFD#U0 Renesas Electronics America, R5F64185DFD#U0 Datasheet - Page 27

• Manufacturer Part Number: R5F64185DFD#U0
• Description: MCU 384+8KB FLASH 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C/R32C/100/118r

Specifications of R5F64185DFD#U0

• Core Processor: R32C/100
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IEBus, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 120
• Program Memory Size: 384KB (384K x 8)
• Program Memory Type: FLASH
• Ram Size: 40K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R32C/118 Group
REJ03B0255-0110
Jun 23, 2010
2.2
2.3
2.2.1
2.2.2
2.2.3
2.3.1
2.3.2
2.3.3
2.3.4
2.3.5
2.3.6
2.3.7
The following three registers are provided to minimize the overhead of interrupt sequence.
There are seven types of DMAC-associated registers.
This 32-bit register is used to save the flag register when a fast interrupt is generated.
This 32-bit register is used to save the program counter when a fast interrupt is generated.
This 32-bit register is used to indicate a jump address when a fast interrupt is generated.
These 32-bit registers are used to set DMA transfer mode, bit rate etc.
These 24-bit registers are used to set DMA transfer counting.
These 24-bit registers are used to set the reloaded values for DMA terminal count registers.
These 32-bit registers are used to set DMA source addresses.
These 32-bit registers are used to set the reloaded value for DMA source address register.
These 32-bit registers are used to set DMA destination address.
These 32-bit registers are used to set reloaded values for DMA destination address registers.
Fast Interrupt Registers
DMAC-associated Registers
Save Flag Register (SVF)
Save PC Register (SVP)
Vector Register (VCT)
DMA Mode Registers (DMD0, DMD1, DMD2, and DMD3)
DMA Terminal Count Registers (DCT0, DCT1, DCT2, and DCT3)
DMA Terminal Count Reload Registers (DCR0, DCR1, DCR2, and DCR3)
DMA Source Address Registers (DSA0, DSA1, DSA2, and DSA3)
DMA Source Address Reload Registers (DSR0, DSR1, DSR2, and DSR3)
DMA Destination Address Registers (DDA0, DDA1, DDA2, and DDA3)
DMA Destination Address Reload Registers (DDR0, DDR1, DDR2, and
DDR3)
Rev.1.10
2. Central Processing Unit (CPU)
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