R5F64169DFD#U0 Renesas Electronics America, R5F64169DFD#U0 Datasheet - Page 2

• Manufacturer Part Number: R5F64169DFD#U0
• Description: MCU 1MB+8KB FLASH 63K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: M16C/R32C/100/116r

Specifications of R5F64169DFD#U0

• Core Processor: R32C/100
• Core Size: 16/32-Bit
• Speed: 50MHz
• Connectivity: EBI/EMI, I²C, IEBus, UART/USART
• Peripherals: DMA, LVD, PWM, WDT
• Number Of I /o: 120
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 63K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 34x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

R32C/116 Group
REJ03B0253-0110
Jun 23, 2010
1.1.2
Table 1.1
Note:
CPU
Memory
Voltage
Detector
Clock
External Bus
Expansion
Interrupts
Watchdog Timer
DMA
I/O Ports
1.
Table 1.1 to Table 1.4 show the performance overview of the R32C/116 Group.
Unit
Please contact a Renesas Electronics sales office to use the optional feature.
Performance Overview
R32C/116 Group Performance for the 144 pin-Package (1/2)
Central
processing unit
Low voltage
detector
Clock generator
Bus and memory
expansion
DMAC
DMAC II
Programmable
I/O ports
Rev.1.10
Function
R32C/100 Series CPU Core
Flash memory: 384 Kbytes to 1 Mbyte
RAM: 40 K/48 K/63 Kbytes
Data flash: 4 Kbytes × 2 blocks
Refer to Table 1.5 for memory size of each product group
Optional
Interrupt vectors: 261
External interrupt inputs: NMI, INT × 9, key input × 4
Interrupt priority levels: 7 levels
15 bits × 1 (selectable input frequency from prescaler output)
4 channels
• 4 circuits (main clock, sub clock, PLL, on-chip oscillator)
• Basic instructions: 108
• Minimum instruction execution time: 15.625 ns (f(CPU) = 64 MHz)
• Multiplier: 32-bit × 32-bit
• Multiply-accumulate unit: 32-bit × 32-bit + 64-bit
• IEEE-754 floating point standard: Single precision
• 32-bit barrel shifter
• Operating mode: Single-chip mode, memory expansion mode,
• Oscillation stop detector: Main clock oscillator stop/re-oscillation
• Frequency divide circuit: Divide-by-2 to divide-by-24 selectable
• Low power modes: Wait mode, stop mode
• Address space: 4 Gbytes (of which up to 64 Mbytes is user
• External bus Interface: Support for wait-state insertion, 4 chip select
• Bus format: Separate bus/Multiplexed bus selectable, data bus width
• Cycle-steal transfer mode
• Request sources: 57
• 2 transfer modes: Single transfer, repeat transfer
• Can be activated by any peripheral interrupt source
• 3 transfer functions: Immediate data transfer, calculation transfer,
• 2 input-only ports
• 120 CMOS inputs/outputs
• A pull-up resistor is selectable for every 4 input ports (except 5 V
microprocessor mode (optional
Low voltage detection interrupt
detection
accessible)
outputs
selectable (8/16/32 bits)
chained transfer
tolerant inputs)
• 32 ports are 5 V tolerant
(1)
Performance
64-bit
(1)
)
64-bit
Page 2 of 95
1. Overview