HD6473834HV Renesas Electronics America, HD6473834HV Datasheet - Page 123

• Manufacturer Part Number: HD6473834HV
• Description: MCU 5V 32K PB-FREE 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD6473834HV

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: SCI
• Peripherals: LCD, PWM
• Number Of I /o: 71
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: OTP
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-QFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.8.2
Time Required before Direct Transfer from Active (High-speed) Mode to Active (Medium-
Speed) Mode: A direct transfer is made from active (high-speed) mode to active (medium-speed)
mode when a SLEEP instruction is executed in active (high-speed) mode while the SSBY and
LSON bits in SYSCR1 are cleared to 0, the MSON bit in SYSCR2 is set to 1, and the DTON bit in
SYSCR2 is set to 1. A direct transfer time, that is, the time from SLEEP instruction execution to
interrupt exception handling completion is calculated by expression (1) below.
Time Required before Direct Transfer from Active (Medium-Speed) Mode to Active (High-
Speed) Mode: A direct transfer is made from active (medium-speed) mode to active (high-speed)
mode when a SLEEP instruction is executed in active (medium-speed) mode while the SSBY and
LSON bits in SYSCR1 are cleared to 0, the MSON bit in SYSCR2 is cleared to 0, and the DTON
bit in SYSCR2 is set to 1. A direct transfer time, that is, the time from SLEEP instruction
execution to interrupt exception handling completion is calculated by expression (2) below.
Time Required before Direct Transfer from Subactive Mode to Active (High-Speed) Mode:
A direct transfer is made from subactive mode to active (high-speed) mode when a SLEEP
instruction is executed in subactive mode while the SSBY bit in SYSCR1 is set to 1, the LSON bit
in SYSCR1 is cleared to 0, the MSON bit in SYSCR2 is cleared to 0, the DTON bit in SYSCR2 is
set to 1, and the TMA3 bit in TMA is set to 1. A direct transfer time, that is, the time from SLEEP
106
Direct transfer time = (number of states for SLEEP instruction execution + number of
Example: Direct transfer time for the H8/3834 Series
Direct transfer time = (number of states for SLEEP instruction execution + number of
Example: Direct transfer time for the H8/3834 Series
Calculation of Direct Transfer Time before Transition
= (2 + 1)
Notation:
tosc: OSC clock cycle time
tcyc: System clock ( ) cycle time
= (2 + 1)
Notation:
tosc: OSC clock cycle time
tcyc: System clock ( ) cycle time
2tosc + 14
16tosc + 14
states for internal processing)
states for interrupt exception handling execution
transition
states for internal processing)
states for interrupt exception handling execution
transition
16tosc = 230 tosc
2tosc = 76 tosc
tcyc before transition + number of
tcyc before transition + number of
tcyc after
tcyc after
...... (1)
...... (2)