M30620FCAFP#D3 Renesas Electronics America, M30620FCAFP#D3 Datasheet - Page 151
![IC M16C MCU FLASH 128K 100LQFP](/photos/28/61/286112/100-bqfp__prqp0100jb-a_sml.jpg)
M30620FCAFP#D3
Manufacturer Part Number
M30620FCAFP#D3
Description
IC M16C MCU FLASH 128K 100LQFP
Manufacturer
Renesas Electronics America
Series
M16C™ M16C/60r
Specifications of M30620FCAFP#D3
Core Processor
M16C/60
Core Size
16-Bit
Speed
16MHz
Connectivity
SIO, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
10K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 10x10b, D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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A-D Converter
148
A-D Converter
Table 1.17.1. Performance of A-D converter
Note 1: Does not depend on use of sample and hold function.
Note 2: Divide the frequency if f(X
The A-D converter consists of one 10-bit successive approximation A-D converter circuit with a capacitive coupling
amplifier. Pins P10
these pins for A-D conversion must therefore be set to input. The Vref connect bit (bit 5 at address 03D7
used to isolate the resistance ladder of the A-D converter from the reference voltage input pin (V
converter is not used. Doing so stops any current flowing into the resistance ladder from V
dissipation. When using the A-D converter, start A-D conversion only after setting bit 5 of 03D7
The result of A-D conversion is stored in the A-D registers of the selected pins. When set to 10-bit precision, the low
8 bits are stored in the even addresses and the high 2 bits in the odd addresses. When set to 8-bit precision, the low
8 bits are stored in the even addresses.
Table 1.17.1 shows the performance of the A-D converter. Figure 1.17.1 shows the block diagram of the
A-D converter, and Figures 1.17.2 and 1.17.3 show the A-D converter-related registers.
Method of A-D conversion Successive approximation (capacitive coupling amplifier)
Analog input voltage (Note 1) 0V to AV
Operating clock
Resolution
Absolute precision
Operating modes
Analog input pins
A-D conversion start condition • Software trigger
Conversion speed per pin • Without sample and hold function
Without sample and hold function, set the
With the sample and hold function, set the
Item
AD
0
(Note 2) V
to P10
7
, P9
V
8-bit or 10-bit (selectable)
V
V
One-shot mode, repeat mode, single sweep mode, repeat sweep mode 0,
and repeat sweep mode 1
8pins (AN
• External trigger (can be retriggered)
• With sample and hold function
A-D conversion starts when the A-D conversion start flag changes to “1”
A-D conversion starts when the A-D conversion start flag is “1” and the
___________
AD
8-bit resolution: 49
8-bit resolution: 28
CC
CC
CC
CC
5
, and P9
IN
TRG
= 5V
= 3V
= 5V
= 3V
) exceeds 10MH
/P9
CC
0
6
to AN
7
(V
also function as the analog signal input pins. The direction registers of
f
divide-by-2 of f
• Without sample and hold function
• With sample and hold function (8-bit resolution)
• With sample and hold function (10-bit resolution)
• Without sample and hold function (8-bit resolution)
input changes from “H” to “L”
AD
CC
AN
ANEX0 and ANEX1 input (including mode in which external
operation amp is connected) : 7LSB
/divide-by-2 of f
)
3LSB
2LSB
2LSB
7
) + 2pins (ANEX0 and ANEX1)
0
to AN
AD
AD
Z
AD
, and make
AD
cycles, 10-bit resolution: 59
cycles, 10-bit resolution: 33
frequency to 250kH
frequency to 1MH
7
AD
input : 3LSB
/divide-by-4 of f
AD
Performance
/divide-by-4 of f
AD
frequency equal to or less than 10MHz.
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Z
Z
AD
min.
min.
, f
AD
AD
, f
=f(X
AD
AD
AD
REF
=f(X
IN
cycles
cycles
)
M16C / 62A Group
, reducing the power
16
Mitsubishi microcomputers
REF
IN
to connect V
)
) when the A-D
16
) can be
REF
.
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