M30624FGNHP#U5 Renesas Electronics America, M30624FGNHP#U5 Datasheet - Page 37

• Manufacturer Part Number: M30624FGNHP#U5
• Description: MCU 3V 256K PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGNHP#U5

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bus Control
34
Table 1.10.3. Operation of RD, WRL, and WRH signals
Table 1.10.4. Operation of RD, WR, and BHE signals
Figure 1.10.3. ALE signal and address/data bus
(3) Read/write signals
(4) ALE signal
Data bus width
Data bus width
(BYTE = “H”)
(BYTE = “L”)
With a 16-bit data bus (BYTE pin =“L”), bit 2 of the processor mode register 0 (address 0004
combinations of RD, BHE, and WR signals or RD, WRL, and WRH signals. With an 8-bit data bus (BYTE
pin = “H”), use the combination of RD, WR, and BHE signals. (Set bit 2 of the processor mode register 0
(address 0004
After a reset has been cancelled, the combination of RD, WR, and BHE signals is automatically selected.
When switching to the RD, WRL, and WRH combination, do not write to external memory until bit 2 of the
processor mode register 0 (address 0004
Note: Before attempting to change the contents of the processor mode register 0, set bit 1 of the protect
(BYTE = “L”)
The ALE signal latches the address when accessing the multiplex bus space. Latch the address when the
ALE signal falls.
D
0
/A
16-bit
8-bit
16-bit
0
A
to D
8
register (address 000A
When BYTE pin = “H”
to A
ALE
7
/A
19
7
16
_____ ________
) to “0”.) Tables 1.10.3 and 1.10.4 show the operation of these signals.
RD
H
H
H
H
L
L
L
L
Address
Note 1: Floating when reading.
Note 2: When multiplexed bus for the entire space is selected, these are I/O ports.
RD
H
H
H
L
_____ _________
Address (Note 2)
_____
_____
WR
16
H
H
H
H
L
L
L
L
______
________
______
WRL
) to “1”.
Data (Note 1)
H
H
L
L
_____
_________
Not used
Not used
______
________
BHE
_________
H
H
L
L
L
L
16
WRH
) has been set (Note).
H
H
L
L
_____
_______
________
H / L
H / L
_____
A0
D
Read data
Write 1 byte of data to odd address
Write data to both even and odd addresses
Write 1 byte of data to even address
H
H
L
L
L
L
0
/A
1
______
A
to D
9
When BYTE pin = “L”
to A
Write 1 byte of data to odd address
Read 1 byte of data from odd address
Read 1 byte of data from even address
Read data from both even and odd addresses
Write 1 byte of data
Read 1 byte of data
_________
Write 1 byte of data to even address
Write data to both even and odd addresses
ALE
7
/A
A
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
19
0
8
Status of external data bus
________
Status of external data bus
Address
Address
Address
M16C / 62N Group
Mitsubishi microcomputers
Data (Note 1)
16
) select the