M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 379

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Clock-Synchronous Serial I/O
2-60
Operation
2.4.2 Operation of Serial I/O (transmission in clock-synchronous serial I/O mode)
In transmitting data in clock-synchronous serial I/O mode, choose functions from those listed in Table
2.4.1. Operations of the circled items are described below. Figure 2.4.7 shows the operation timing, and
Figures 2.4.8 and 2.4.9 show the set-up procedures.
(1) Setting the transmit enable bit to “1” and writing transmission data to the UARTi transmit
(2) When input to the CTSi pin goes to “L” level, transmission starts (the CTSi pin must be
(3) In synchronization with the first falling edge of the transfer clock, transmission data held in the
(4) When transmission of 1-byte data is completed, the transmit register empty flag goes to “1”,
(5) If the next transmission data is set in the UARTi transmit buffer register while transmission is
Table 2.4.1. Choosed functions
Note 1: This can be selected only when UART1 is used in combination with the internal clock. When this function is
Note 2: UART2 only.
CTS function
CLK polarity
Transfer clock
Transfer clock
source
buffer register makes data transmissible status ready.
controlled on the reception side).
UARTi transmit buffer register is transmitted to the UARTi transmit register. At this time, the
UARTi transmit interrupt request bit goes to “1”. Also, the first bit of the transmission data is
transmitted from the TxDi pin. Then the data is transmitted bit by bit from the lower order in
synchronization with the falling edges.
which indicates that transmission is completed. The transfer clock stops at “H” level.
in progress (before the eighth bit has been transmitted), the data is transmitted in succession.
selected, UART1 CTS/RTS function can not be utilized. Set the UART1 CTS/RTS disable bit to “1”.
Item
O
O
O
O
_______ _______
________
CTS function enabled
LSB first
MSB first
Internal clock (f
External clock (CLKi pin)
CTS function disabled
Output transmission data at
the falling edge of the
transfer clock
Output transmission data at
the rising edge of the
transfer clock
Set-up
1
/ f
8
/ f
32
)
Transmission
interrupt factor
Output transfer clock
to multiple pins
(Note 1)
Data logic select
function
(Note 2)
T
polarity reverse bit
(Note 2)
X
D, R
X
Item
D I/O
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
_______ _______
O
O
O
O
No reverse
Reverse
No reverse
Reverse
Not selected
Selected
Transmission buffer empty
Transmission complete
M16C / 62A Group
Mitsubishi microcomputers
_______
Set-up