M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 498

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Power Control
Operation
Figure 2.15.6. Example of wait mode set-up
2.15.3 Wait Mode Set-Up
Settings and operation for entering wait mode are described here.
(2) Interrupt enable flag (I flag)
(3) Canceling protect
(1) Setting interrupt to cancel wait mode
b7
b7
(3) Control of CPU clock
(4) WAIT instruction
b7
Note 1: When switching the system clock, it is necessary to wait for the oscillation to stabilize.
Note 2: Set the WAIT peripheral function clock stop bit to “0” when the system clock select bit is “1”.
Insert at least four NOPs after the WAIT instruction is executed.
(1) Enables the interrupt used for returning from wait mode.
(2) Sets the interrupt enable flag (I flag) to “1”.
(3) Clears the protection and changes the content of the system clock control register.
(4) Executes the WAIT instruction.
0 0 0 0
Interrupt control register
TBiIC(i=3 to 5)
BCNIC
KUPIC
SiTIC(i=0 to 2)
SiRIC(i=0 to 2)
TAiIC(i=0 to 4)
TBiIC(i=0 to 2)
b0
b0
1
b0
Interrupt priority level select bit
Enables writing to system clock control registers 0 and 1
(addresses 0006
Make sure that the interrupt priority
level of the interrupt which is used
to cancel the wait mode is higher
than the processor interrupt priority
(IPL) of the routine where the
WAIT instruction is executed.
Reserved bit
Main clock division select bit
1 : Write-enabled
Protect register [Address 000A
PRCR
b7 b6
System clock control register 1
[Address 0007
Must always be set to “0”
0 0 : No division mode
0 1 : Division by 2 mode
1 0 : Division by 4 mode
1 1 : Division by 16 mode
[Address 0045
[Address 004A
[Address 004D
[Address 0051
[Address 0052
[Address 0055
[Address 005A
“1”
16
16
] CM1
and 0007
16
16
16
16
16
16
16
, 0053
, 0054
to 0047
]
]
to 0059
to 005C
16
)
16
16
16
]
16
16
, 004F
, 0050
16
]
b7
]
]
16
16
Wait
]
]
0
b7
INTiIC(i=3)
SiIC/INTjIC (i=4, 3)
INTiIC(i=0 to 2)
b0
Interrupt priority level select bit
Reserved bit
Make sure that the interrupt priority level of the
interrupt which is used to cancel the wait mode is
higher than the processor interrupt priority (IPL) of
the routine where the WAIT instruction is executed.
Must always be set to “0”
(j=3, 4)
b0
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
WAIT peripheral function clock stop bit (Note 2)
Port X
Main clock (X
Main clock division select bit 0
System clock select bit (Note 1)
0 : Do not stop f
1 : Stop f
0 : I/O port
1 : X
0 : On
1 : Off
0 : CM16 and CM17 valid
1 : Division by 8 mode
0 : X
1 : X
System clock control register 0
[Address 0006
[Address 0044
[Address 0048
[Address 0048
[Address 005D
CIN
IN
CIN
C
, X
select bit
-X
, X
1
OUT
, f
COUT
COUT
8
IN
, f
-X
16
32
generation
1
OUT
] CM0
, f
in wait mode
16
16
16
16
8
]
, 0049
, 0049
, f
) stop bit
to 005F
32
in wait mode
M16C / 62A Group
16
16
Mitsubishi microcomputers
]
]
16
]
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