UPD78F0500MC-5A4-A Renesas Electronics America, UPD78F0500MC-5A4-A Datasheet - Page 586

no-image

UPD78F0500MC-5A4-A

Manufacturer Part Number
UPD78F0500MC-5A4-A
Description
MCU 8BIT FLASH SSOP
Manufacturer
Renesas Electronics America
Series
78K0/Kx2r
Datasheet

Specifications of UPD78F0500MC-5A4-A

Core Processor
78K/0
Core Size
8-Bit
Speed
20MHz
Connectivity
3-Wire SIO, I²C, LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD78F0500MC-5A4-A
Manufacturer:
NEC
Quantity:
8 000
78K0/Kx2
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
(1) Master operation in single-master system
Note Release (SCL0 and SDA0 pins = high level) the I
Remark
that is communicating. If EEPROM is outputting a low level to the SDA0 pin, for example, set the SCL0 pin in
the output port mode, and output a clock pulse from the output port until the SDA0 pin is constantly at high level.
Conform to the specifications of the product that is communicating, with respect to the transmission and
reception formats.
No
No
ACKE0 = WTIM0 = SPIE0 = 1
Figure 18-23. Master Operation in Single-Master System
Setting STCEN, IICRSV = 0
Initializing I
Interrupt occurs?
interrupt occurs?
interrupt occurs?
End of transfer?
IICCL0
SVA0
IICC0
IICX0
IICF0
STCEN = 1?
ACKD0 = 1?
ACKD0 = 1?
Writing IIC0
Writing IIC0
Setting port
TRC0 = 1?
IICE0 = 1
SPT0 = 1
STT0 = 1
INTIIC0
INTIIC0
INTIIC0
Restart?
START
No
Yes
2
Yes
Yes
Yes
Yes
Yes
Yes
Yes
C bus
XXH
XXH
0XH
0XH
XXH
Note
Waits for detection of the stop condition.
Yes
No
No
No
No
No
No
Prepares for starting communication
(generates a stop condition).
Starts transmission.
Waits for data transmission.
Prepares for starting communication
(generates a start condition).
Starts communication
(specifies an address and transfer
direction).
Waits for detection of acknowledge.
Selects a transfer clock.
Sets a local address.
Sets a start condition.
Sets each pin in the I
SPT0 = 1
END
2
C bus in conformance with the specifications of the product
2
C mode (see 18.3 (7) Port mode register 6 (PM6)).
CHAPTER 18 SERIAL INTERFACE IIC0
WTIM0 = WREL0 = 1
interrupt occurs?
interrupt occurs?
End of transfer?
Reading IIC0
WREL0 = 1
ACKE0 = 0
ACKE0 = 1
WTIM0 = 0
INTIIC0
INTIIC0
Yes
Yes
Yes
No
No
No
Waits for data
reception.
Waits for detection
of acknowledge.
Starts reception.
586

Related parts for UPD78F0500MC-5A4-A