UPD78F9212CS-CAB-A Renesas Electronics America, UPD78F9212CS-CAB-A Datasheet - Page 114

• Manufacturer Part Number: UPD78F9212CS-CAB-A
• Description: MCU 8BIT 4KB FLASH 16PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9212CS-CAB-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

112
CR010 capture value
CR000 capture value
(4) Pulse width measurement by means of restart
Note If the valid edge of TI000 is specified to be both the rising and falling edges, 16-bit timer capture/compare
TM00 count value
CRC00
TI000 pin input
Note The carry flag is set to 1. Ignore this setting.
Specify both the rising and falling edges as the valid edges of the TI000 pin, by using bits 4 and 5 (ES000 and
ES010) of PRM00.
When input of a valid edge to the TI000 pin is detected, the count value of 16-bit timer/counter 00 (TM00) is
taken into 16-bit timer capture/compare register 010 (CR010), and then the pulse width of the signal input to
the TI000 pin is measured by clearing TM00 and restarting the count.
Sampling is performed at the interval selected by prescaler mode register 00 (PRM00) and a capture operation
is only performed when a valid level of the TI000 pin is detected twice, thus eliminating noise with a short
pulse width.
Caution The measurable pulse width in this operation example is up to 1 cycle of the timer counter.
Count clock
INTTM010
register 000 (CR000) cannot perform the capture operation.
Figure 6-26. Control Register Settings for Pulse Width Measurement by Means of Restart
Figure 6-25. Timing of Pulse Width Measurement Operation by Free-Running Counter
7
0
6
0
0000H
t
and Two Capture Registers (with Rising Edge Specified)
5
0
0001H
(a) Capture/compare control register 00 (CRC00)
4
0
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
3
0
(with Rising Edge Specified) (1/2)
D0
CRC002
(D1
D0
User’s Manual U16994EJ6V0UD
D0 + 1
1
D0)
CRC001
1
t
CRC000
D1
1
D1
D1 + 1
CR000 used as capture register
Captures to CR000 at inverse edge to valid edge of TI000
CR010 used as capture register
(D2
FFFFH
D1)
0000H
t
Note
D2
(D3
D2 + 1
D2
D2)
t
D3
Note
.
D3