UPD78F9212CS-CAB-A Renesas Electronics America, UPD78F9212CS-CAB-A Datasheet - Page 180

• Manufacturer Part Number: UPD78F9212CS-CAB-A
• Description: MCU 8BIT 4KB FLASH 16PIN
• Manufacturer: Renesas Electronics America
• Series: 78K0S/Kx1+r

Specifications of UPD78F9212CS-CAB-A

• Core Processor: 78K0S
• Core Size: 8-Bit
• Speed: 10MHz
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 13
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Connectivity: -

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178
Maskable
Reset
Interrupt Type
Notes 1. Priority is the vector interrupt servicing priority order when several maskable interrupt requests are
2. Basic configuration types (A) and (B) correspond to (A) and (B) in Figure 10-1.
3.
4. When bit 1 (LVIMD) of low-voltage detection register (LVIM) = 0 is selected.
5. When bit 1 (LVIMD) of low-voltage detection register (LVIM) = 1 is selected.
generated at the same time. 1 is the highest and 7 is the lowest.
PD78F921x only
Priority
1
2
3
4
5
6
7
Note 1
INTLVI
INTP0
INTP1
INTTMH1
INTTM000
INTTM010
INTAD
RESET
POC
LVI
WDT
Name
Note 3
CHAPTER 10 INTERRUPT FUNCTIONS
Table 10-1. Interrupt Sources
Low-voltage detection
Pin input edge detection
Match between TMH1 and CMP01
(when compare register is specified)
Match between TM00 and CR000
(when compare register is specified),
TI010 pin valid edge detection (when
capture register is specified)
Match between TM00 and CR010
(when compare register is specified),
TI000 pin valid edge detection (when
capture register is specified)
End of A/D conversion
Reset input
Power-on-clear
Low-voltage detection
WDT overflow
User’s Manual U16994EJ6V0UD
Interrupt Source
Trigger
Note 4
Note 5
Internal
External
Internal
Internal/
External
Vector Table
Address
000AH
000CH
000EH
0006H
0008H
0010H
0012H
0000H
Configuration
Type
Basic
(A)
(B)
(A)
Note 2