UPD78F9222CS-CAC-A Renesas Electronics America, UPD78F9222CS-CAC-A Datasheet - Page 396

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UPD78F9222CS-CAC-A

Manufacturer Part Number
UPD78F9222CS-CAC-A
Description
MCU 8BIT 4KB FLASH 20PIN
Manufacturer
Renesas Electronics America
Series
78K0S/Kx1+r
Datasheet

Specifications of UPD78F9222CS-CAC-A

Core Processor
78K0S
Core Size
8-Bit
Speed
10MHz
Connectivity
LIN, UART/USART
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
15
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
394
A/D
converter
Function
Input range of
ANI0 to ANI3
Conflicting
operations
Noise counter-
measures
ANI0/P20 to
ANI3/P23
Input
impedance of
ANI0 to ANI3
pins
Details of
Function
Observe the rated range of the ANI0 to ANI3 input voltage. If a voltage of AV
or higher and V
input to an analog input channel, the converted value of that channel becomes
undefined. In addition, the converted values of the other channels may also be
affected.
Conflict between A/D conversion result register (ADCR, ADCRH) write and
ADCR, ADCRH read by instruction upon the end of conversion ADCR, ADCRH
read has priority. After the read operation, the new conversion result is written
to ADCR, ADCRH.
Conflict between ADCR, ADCRH write and A/D converter mode register (ADM)
write or analog input channel specification register (ADS) write upon the end of
conversion ADM or ADS write has priority. ADCR, ADCRH write is not
performed, nor is the conversion end interrupt signal (INTAD) generated.
To maintain the 10-bit resolution, attention must be paid to noise input to the
AV
<1> Connect a capacitor with a low equivalent resistance and a high frequency
<2> Because the effect increases in proportion to the output impedance of the
<3> Do not switch the A/D conversion function of the ANI0 to ANI3 pins to their
<4> The conversion accuracy can be improved by setting HALT mode
The analog input pins (ANI0 to ANI3) are also used as I/O port pins (P20 to
P23).
When A/D conversion is performed with any of ANI0 to ANI3 selected, do not
access P20 to P23 while conversion is in progress; otherwise the conversion
resolution may be degraded.
If a digital pulse is applied to the pins adjacent to the pins currently used for A/D
conversion, the expected value of the A/D conversion may not be obtained due
to coupling noise. Therefore, do not apply a pulse to the pins adjacent to the
pin undergoing A/D conversion.
In this A/D converter, the internal sampling capacitor is charged and sampling is
performed during sampling time.
Since only the leakage current flows other than during sampling and the current
for charging the capacitor also flows during sampling, the input impedance
fluctuates both during sampling and otherwise.
If the shortest conversion time of the reference voltage is used, to perform
sufficient sampling, it is recommended to make the output impedance of the
analog input source 1 k or lower, or attach a capacitor of around 0.01 F to
0.1 F to the ANI0 to ANI3 pins (see Figure 10-19).
REF
response to the power supply.
analog input source, it is recommended that a capacitor be connected
externally, as shown in Figure 9-19, to reduce noise.
alternate functions during conversion.
immediately after the conversion starts.
pin and ANI0 to ANI3 pins.
APPENDIX D LIST OF CAUTIONS
User’s Manual U16898EJ6V0UD
SS
or lower (even in the range of absolute maximum ratings) is
Cautions
REF
p. 178
p. 178
p. 178
p. 179
p. 179
p. 179
p. 179
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(9/19)

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