MAXQ610A-0000+ Maxim Integrated Products, MAXQ610A-0000+ Datasheet - Page 11

• Manufacturer Part Number: MAXQ610A-0000+
• Description: IC MCU 16BIT 64K IR MOD 32TQFN
• Manufacturer: Maxim Integrated Products
• Series: MAXQ™r

Specifications of MAXQ610A-0000+

• Core Processor: RISC
• Core Size: 16-Bit
• Speed: 12MHz
• Connectivity: SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Infrared, Power-Fail, POR, WDT
• Number Of I /o: 20
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 32-TQFN Exposed Pad
• Processor Series: MAXQ610
• Core: RISC
• Data Bus Width: 16 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART
• Maximum Clock Frequency: 12 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 1.7 V to 3.6 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: 0 C
• Controller Family/series: MAXQ
• No. Of I/o's: 24
• Ram Memory Size: 2048Byte
• Cpu Speed: 12MHz
• No. Of Timers: 2
• Embedded Interface Type: JTAG, SPI, USART
• Rohs Compliant: Yes
• Number Of Programmable I/os: 32
• Development Tools By Supplier: MAXQ610-KIT
• Package: 32TQFN EP
• Family Name: MAXQ
• Maximum Speed: 12 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 90-M6800+B01

Table 1. Memory Areas and Associated Maximum Privilege Levels
The optional memory-protection feature separates code
memory into three areas: system, user loader, and user
application. Code in the system area can be kept confi-
dential. Code in the user areas can be prevented from
reading and writing system code. The user loader can
also be protected from user application code.
Memory protection is implemented using privilege lev-
els for code. Each area has an associated privilege
level. RAM/ROM are assigned privilege levels as well.
Refer to the MAXQ Family User's Guide: MAXQ610
Supplement for a more thorough explanation of the
topic. See Table 1.
A 16-bit-wide internal stack provides storage for program
return addresses and can also be used general-purpose
data storage. The stack is used automatically by the
processor when the CALL, RET, and RETI instructions
are executed and when an interrupt is serviced. An
application can also store values in the stack explicitly by
using the PUSH, POP, and POPI instructions.
On reset, the stack pointer, SP, initializes to the top of
the stack (0Fh). The CALL, PUSH, and interrupt-vector-
ing operations increment SP, then store a value at the
location pointed to by SP. The RET, RETI, POP, and
POPI operations retrieve the value at SP and then
decrement SP.
The utility ROM is a 5.25KB block of internal ROM mem-
ory that defaults to a starting address of 8000h. The util-
ity ROM consists of subroutines that can be called from
application software. These include the following:
• In-system programming (bootstrap loader) using
• In-circuit debug routines
• Test routines (internal memory tests, memory loader,
• User-callable routines for in-application flash pro-
JTAG interface
etc.)
gramming and fast table lookup
16-Bit Microcontroller with Infrared Module
User Application
User Loader
Other (RAM)
Utility ROM
System
AREA
______________________________________________________________________________________
Memory Protection
Stack Memory
Utility ROM
PAGE ADDRESS
ULDR to UAPP-1
0 to ULDR-1
UAPP to top
N/A
N/A
Following any reset, execution begins in the utility ROM.
The ROM software determines whether the program
execution should immediately jump to location 0000h,
the start of system code, or to one of the special rou-
tines mentioned. Routines within the utility ROM are
user accessible and can be called as subroutines by
the application software. More information on the utility
ROM functions is contained in the MAXQ Family User’s
Guide: MAXQ610 Supplement .
Some applications require protection against unautho-
rized viewing of program code memory. For these
applications, access to in-system programming, in-
application programming, or in-circuit debugging func-
tions is prohibited until a password has been supplied.
The password is defined as the 16 words of physical
program memory at addresses 0010h to 001Fh.
Three password locks are provided for protection of up to
three different program memory segments. When the
PWL is set to 1 (POR default) and the contents of the
memory at addresses 0010h to 001Fh are any value other
than FFh or 00h, the password is required to access the
utility ROM, including in-circuit debug and in-system pro-
gramming routines that allow reading or writing of internal
memory. When PWL is cleared to 0, these utilities are
fully accessible without password. The password is
automatically set to all ones following a mass erase.
An internal watchdog timer greatly increases system
reliability. The timer resets the device if software execu-
tion is disturbed. The watchdog timer is a free-running
counter designed to be periodically reset by the appli-
cation software. If software is operating correctly, the
counter is periodically reset and never reaches its max-
imum count. However, if software operation is interrupt-
ed, the timer does not reset, triggering a system reset
and optionally a watchdog timer interrupt. This protects
the system against electrical noise or ESD upsets that
could cause uncontrolled processor operation. The
internal watchdog timer is an upgrade to older designs
with external watchdog devices, reducing system cost
and simultaneously increasing reliability.
MAXIMUM PRIVILEGE LEVEL
Watchdog Timer
Medium
High
High
Low
Low
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