UPD78F1174AGF-GAT-AX Renesas Electronics America, UPD78F1174AGF-GAT-AX Datasheet - Page 248

• Manufacturer Part Number: UPD78F1174AGF-GAT-AX
• Description: MCU 16BIT 78K0R/KX3 128-LQFP
• Manufacturer: Renesas Electronics America
• Series: 78K0R/Kx3r

Specifications of UPD78F1174AGF-GAT-AX

• Core Processor: 78K/0R
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, EBI/EMI, I²C, LIN, UART/USART
• Peripherals: DMA, LVD, POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.2 Configuration of Timer Array Unit
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The timer array unit includes the following hardware.
Remark
Figure 7-1 and Figure7-2 shows the block diagram.
Timer/counter
Register
Timer input
Timer output
Control registers
m: Unit number (m = 0, 1), n: Channel number (n = 0 to 7)
mn = 00 to 07, 10 to 13
Item
Timer counter register mn (TCRmn)
Timer data register mn (TDRmn)
TI00 to TI07, TI10 to TI13 pins, RxD3 pin (for LIN-bus)
TO00 to TO07, TO10 to TO13 pins, output controller
<Registers of unit setting block>
• Peripheral enable register 0 (PER0)
• Timer clock select register m (TPSm)
• Timer channel enable status register m (TEm)
• Timer channel start register m (TSm)
• Timer channel stop register m (TTm)
• Timer input select register m (TISm)
• Timer output enable register m (TOEm)
• Timer output register m (TOm)
• Timer output level register m (TOLm)
• Timer output mode register m (TOMm)
<Registers of each channel>
• Timer mode register mn (TMRmn)
• Timer status register mn (TSRmn)
• Input switch control register (ISC) (channel 7 only)
• Noise filter enable registers 1, 2 (NFEN1, NFEN2)
• Port mode registers 0, 1, 3, 4, 13, 14, 16 (PM0, PM1, PM3, PM4, PM13, PM14, PM16)
• Port registers 0, 1, 3, 4, 13, 14, 16 (P0, P1, P3, P4, P13, P14, P16)
Table 7-1. Configuration of Timer Array Unit
CHAPTER 7 TIMER ARRAY UNIT
User’s Manual U18432EJ5V0UD
Configuration