AT89C51ID2-RLRIM Atmel, AT89C51ID2-RLRIM Datasheet - Page 28

• Manufacturer Part Number: AT89C51ID2-RLRIM
• Description: IC MCU FLASH 8051 64K 5V 44-VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51ID2-RLRIM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -
• Other names: AT89C51ID2RLRIMTR

Expanded RAM
(XRAM)
Figure 6. Internal and External Data Memory Address
4289C–8051–11/05
0FFh to 6FFh
00
XRAM
The AT89C51ID2 provides additional Bytes of random access memory (RAM) space for
increased data parameter handling and high level language usage.
AT89C51ID2 devices have expanded RAM in external data space configurable up to
1792bytes (see Table 24.).
The AT89C51ID2 has internal data memory that is mapped into four separate
segments.
The four segments are:
1. The Lower 128 bytes of RAM (addresses 00h to 7Fh) are directly and indirectly
2. The Upper 128 bytes of RAM (addresses 80h to FFh) are indirectly addressable
3. The Special Function Registers, SFRs, (addresses 80h to FFh) are directly
4. The expanded RAM bytes are indirectly accessed by MOVX instructions, and
The lower 128 bytes can be accessed by either direct or indirect addressing. The Upper
128 bytes can be accessed by indirect addressing only. The Upper 128 bytes occupy
the same address space as the SFR. That means they have the same address, but are
physically separate from SFR space.
When an instruction accesses an internal location above address 7Fh, the CPU knows
whether the access is to the upper 128 bytes of data RAM or to SFR space by the
addressing mode used in the instruction.
•
•
•
addressable.
only.
addressable only.
with the EXTRAM bit cleared in the AUXR register (see Table 24).
Instructions that use direct addressing access SFR space. For example: MOV
0A0H, # data, accesses the SFR at location 0A0h (which is P2).
Instructions that use indirect addressing access the Upper 128 bytes of data RAM.
For example: MOV @R0, # data where R0 contains 0A0h, accesses the data byte
at address 0A0h, rather than P2 (whose address is 0A0h).
The XRAM bytes can be accessed by indirect addressing, with EXTRAM bit cleared
and MOVX instructions. This part of memory which is physically located on-chip,
logically occupies the first bytes of external data memory. The bits XRS0 and XRS1
are used to hide a part of the available XRAM as explained in Table 24. This can be
0FFh
80h
7Fh
00
indirect accesses
direct or indirect
128 bytes
128 bytes
accesses
Internal
Internal
Upper
Lower
Ram
Ram
0FFh
80h
direct accesses
Function
Register
Special
00FFh up to 06FFh
0FFFFh
0000
AT89C51ID2
External
Memory
Data
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