PIC16C74-04/P Microchip Technology, PIC16C74-04/P Datasheet - Page 135

• Manufacturer Part Number: PIC16C74-04/P
• Description: MICRO CTRL 4K 4MHZ OTP 40DIP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C74-04/P

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 33
• Program Memory Size: 7KB (4K x 14)
• Program Memory Type: OTP
• Ram Size: 192 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -

14.4.5
On power-up the time-out sequence is as follows: First
PWRT time-out is invoked after the POR time delay has
expired. Then OST is activated. The total time-out will
vary based on oscillator configuration and the status of
the PWRT. For example, in RC mode with the PWRT
disabled, there will be no time-out at all. Figure 14-10,
Figure 14-11,
sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 14-11). This is useful for testing purposes or to
synchronize more than one PIC16CXX device operat-
ing in parallel.
Table 14-7 shows the reset conditions for some special
function registers, while Table 14-8 shows the reset
conditions for all the registers.
TABLE 14-3:
TABLE 14-4:
TABLE 14-5:
Legend: u = unchanged, x = unknown
Oscillator Configuration
1997 Microchip Technology Inc.
Oscillator Configuration
POR
0
0
0
1
1
1
1
XT, HS, LP
TIME-OUT SEQUENCE
XT, HS, LP
RC
and
RC
TIME-OUT IN VARIOUS SITUATIONS, PIC16C73/74
TIME-OUT IN VARIOUS SITUATIONS, PIC16C72/73A/74A/76/77
STATUS BITS AND THEIR SIGNIFICANCE, PIC16C73/74
TO
Figure 14-12
1
0
x
0
0
u
1
72 ms + 1024T
PWRTE = 0
72 ms
PD
1
x
0
1
0
u
0
depict
72 ms + 1024T
PWRTE = 1
Power-up
OSC
Power-on Reset
Illegal, TO is set on POR
Illegal, PD is set on POR
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during SLEEP or interrupt wake-up from SLEEP
72 ms
time-out
PWRTE = 1
1024T
OSC
Power-up
—
OSC
14.4.6
The Power Control/Status Register, PCON has up to
two bits, depending upon the device. Bit0 is not imple-
mented on the PIC16C73 or PIC16C74.
Bit0 is Brown-out Reset Status bit, BOR. Bit BOR is
unknown on a Power-on Reset. It must then be set by
the user and checked on subsequent resets to see if bit
BOR cleared, indicating a BOR occurred. The BOR bit
is a "Don’t Care" bit and is not necessarily predictable
if the Brown-out Reset circuitry is disabled (by clearing
bit BODEN in the Configuration Word).
Bit1 is POR (Power-on Reset Status bit). It is cleared
on a Power-on Reset and unaffected otherwise. The
user must set this bit following a Power-on Reset.
PWRTE = 0
1024T
72 ms + 1024T
POWER CONTROL/STATUS REGISTER
(PCON)
Applicable Devices
72 73 73A 74 74A 76 77
—
Brown-out
OSC
72 ms
OSC
Wake-up from SLEEP
PIC16C7X
Wake-up from SLEEP
1024 T
DS30390E-page 135
1024T
—
OSC
—
OSC