PIC16C54B-04I/SO Microchip Technology, PIC16C54B-04I/SO Datasheet - Page 23

• Manufacturer Part Number: PIC16C54B-04I/SO
• Description: MICRO CTRL 512 4MHZ OTP 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C54B-04I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 12
• Program Memory Size: 768B (512 x 12)
• Program Memory Type: OTP
• Ram Size: 25 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Data Converters: -
• Connectivity: -

FIGURE 4-12: LOADING OF PC
CALL or Modify PCL Instruction
GOTO Instruction
1998 Microchip Technology Inc.
PC
PC
7
7
10
2
10
2
9
9
STATUS
PA1:PA0
PA1:PA0
STATUS
BRANCH INSTRUCTIONS -
PIC16C57s/PIC16CR57s, AND
PIC16C58s/PIC16CR58s
Reset to ‘0’
8 7
8 7
Instruction Word
Instruction Word
PCL
0
PCL
0
0
0
Preliminary
4.5.1
If the Program Counter is pointing to the last address
of a selected memory page, when it increments it will
cause the program to continue in the next higher page.
However, the page preselect bits in the STATUS
register will not be updated. Therefore, the next GOTO,
CALL, or Modify PCL instruction will send the program
to the page specified by the page preselect bits (PA0
or PA1:PA0).
For example, a NOP at location 1FFh (page 0)
increments the PC to 200h (page 1). A GOTO xxx at
200h will return the program to address 0xxh on page
0 (assuming that PA1:PA0 are clear).
To prevent this, the page preselect bits must be
updated under program control.
4.5.2
The Program Counter is set upon a RESET, which
means that the PC addresses the last location in the
last page i.e., the reset vector.
The STATUS register page preselect bits are cleared
u p o n a R E S E T, w h i c h m e a n s t h a t p a g e 0 i s
pre-selected.
Therefore, upon a RESET, a GOTO instruction at the
reset vector location will automatically cause the
program to jump to page 0.
4.6
PIC16C5X devices have a 9-bit, 10-bit or 11-bit wide,
two-level hardware push/pop stack (Figure 4-2,
Figure 4-1, and Figure 4-3 respectively).
A CALL instruction will push the current value of stack
1 into stack 2 and then push the current program
counter value, incremented by one, into stack level 1. If
more than two sequential CALL’s are executed, only
the most recent two return addresses are stored.
A RETLW instruction will pop the contents of stack level
1 into the program counter and then copy stack level 2
contents into level 1. If more than two sequential
RETLW’s are executed, the stack will be filled with the
address previously stored in level 2. Note that the
W register will be loaded with the literal value specified
in the instruction. This is particularly useful for the
implementation of data look-up tables within the
program memory.
For the RETLW instruction, the PC is loaded with the
Top Of Stack (TOS) contents. All of the devices
covered in this data sheet have a two-level stack. The
stack has the same bit width as the device PC.
PAGING CONSIDERATIONS –
PIC16C56
PIC16C58
EFFECTS OF RESET
Stack
s
s
/CR56
/CR58
s
s
PIC16C5X
, PIC16C57
DS30453B-page 23
s
/CR57
s
AND