AT90S8515A-4AI Atmel, AT90S8515A-4AI Datasheet - Page 70
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AT90S8515A-4AI
Manufacturer Part Number
AT90S8515A-4AI
Description
IC MCU 8K FLSH 4MHZ LV IT 44TQFP
Manufacturer
Atmel
Series
AVR® 90Sr
Datasheets
1.AT90S8515-4AC.pdf
(112 pages)
2.AT90S8515-4AC.pdf
(4 pages)
3.AT90S8515-4AC.pdf
(4 pages)
Specifications of AT90S8515A-4AI
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Port C
Port C Data Register – PORTC
70
AT90S8515
Figure 51. Port B Schematic Diagram (Pin PB7)
Port C is an 8-bit bi-directional I/O port. Three I/O memory address locations are allo-
cated for the Port C, one each for the Data Register – PORTC, $15($35), Data Direction
Register – DDRC, $14($34) and the Port C Input Pins – PINC, $13($33). The Port C
Input Pins address is read-only, while the Data Register and the Data Direction Register
are read/write.
All port pins have individually selectable pull-up resistors. The Port C output buffers can
sink 20 mA and thus drive LED displays directly. When pins PC0 to PC7 are used as
inputs and are externally pulled low, they will source current if the internal pull-up resis-
tors are activated.
The Port C pins have alternate functions related to the optional external data SRAM.
Port C can be configured to be the high-order address byte during accesses to external
data memory. When Port C is set to the alternate function by the SRE (external SRAM
enable) bit in the MCUCR (MCU Control Register), the alternate settings override the
Data Direction Register.
Bit
$15 ($35)
Read/Write
Initial Value
PORTC7
R/W
PB7
7
0
WP:
WD:
RL:
RP:
RD:
SPE:
MSTR
MOS
PULL-
UP
WRITE PORTB
WRITE DDRB
READ PORTB LATCH
READ PORTB PIN
READ DDRB
SPI ENABLE
MASTER SELECT
PORTC6
R/W
6
0
PORTC5
R/W
5
0
PORTC4
R/W
4
0
PORTC3
R/W
3
0
PORTC2
R/W
RL
RP
2
0
Q
Q
PORTB7
RESET
RESET
DDB7
WD
WP
RD
R
C
R
C
PORTC1
R/W
D
D
1
0
MSTR
SPE
SPI CLOCK
OUT
SPI CLOCK
IN
PORTC0
R/W
0
0
0841G–09/01
PORTC