PIC16C72-10E/SP Microchip Technology, PIC16C72-10E/SP Datasheet - Page 46
![IC MCU OTP 2KX14 A/D PWM 28DIP](/photos/6/59/65908/150-28-dip_sml.jpg)
PIC16C72-10E/SP
Manufacturer Part Number
PIC16C72-10E/SP
Description
IC MCU OTP 2KX14 A/D PWM 28DIP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F818-ISO.pdf
(6 pages)
3.PIC16C72-04SO.pdf
(289 pages)
4.PIC16C72-04SO.pdf
(125 pages)
5.PIC16C72-04SO.pdf
(8 pages)
Specifications of PIC16C72-10E/SP
Core Processor
PIC
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
3.5KB (2K x 14)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Data Converters
A/D 5x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
- PIC16F616T-ISL PDF datasheet
- PIC16F818-ISO PDF datasheet #2
- PIC16C72-04SO PDF datasheet #3
- PIC16C72-04SO PDF datasheet #4
- PIC16C72-04SO PDF datasheet #5
- Current page: 46 of 289
- Download datasheet (3Mb)
PIC16C7X
FIGURE 5-4:
TABLE 5-3:
DS30390E-page 46
Set RBIF
Name
RB0/INT
RB1
RB2
RB3
RB4
RB5
RB6
RB7
Legend: TTL = TTL input, ST = Schmitt Trigger input
Note 1: This buffer is a Schmitt Trigger input when configured as the external interrupt.
Data bus
Note 1: I/O pins have diode protection to V
WR TRIS
WR Port
RBPU
RB7:RB6 in serial programming mode
2: This buffer is a Schmitt Trigger input when used in serial programming mode.
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
(2)
From other
RB7:RB4 pins
and clear the RBPU bit (OPTION<7>).
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
BLOCK DIAGRAM OF
RB7:RB4 PINS (PIC16C73/74)
PORTB FUNCTIONS
RD TRIS
RD Port
Data Latch
TRIS Latch
D
D
CK
CK
Q
Q
TTL/ST
TTL/ST
TTL/ST
Buffer
TTL
TTL
TTL
TTL
TTL
Q
Q
Latch
(1)
(2)
(2)
DD
EN
EN
D
and V
D
TTL
Input
Buffer
Input/output pin or external interrupt input. Internal software
programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin. Internal software programmable weak pull-up.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming clock.
Input/output pin (with interrupt on change). Internal software programmable
weak pull-up. Serial programming data.
Function
SS
V
RD Port
P
.
DD
Buffer
weak
pull-up
I/O
pin
ST
(1)
FIGURE 5-5:
Data bus
WR Port
WR TRIS
RBPU
Note 1: I/O pins have diode protection to V
RB7:RB6 in serial programming mode
Set RBIF
From other
RB7:RB4 pins
2: To enable weak pull-ups, set the appropriate TRIS bit(s)
(2)
and clear the RBPU bit (OPTION<7>).
RD TRIS
RD Port
Data Latch
TRIS Latch
D
D
BLOCK DIAGRAM OF
RB7:RB4 PINS (PIC16C72/
73A/74A/76/77)
CK
CK
Q
Q
1997 Microchip Technology Inc.
Q
Q
Latch
DD
EN
EN
D
D
and V
TTL
Input
Buffer
SS
V
P
DD
.
weak
pull-up
RD Port
Buffer
I/O
pin
Q1
Q3
(1)
ST
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