PIC16LC554-04E/SS Microchip Technology, PIC16LC554-04E/SS Datasheet - Page 45
![IC MCU OTP 512X14 20SSOP](/photos/6/58/65895/150-20-ssop_sml.jpg)
PIC16LC554-04E/SS
Manufacturer Part Number
PIC16LC554-04E/SS
Description
IC MCU OTP 512X14 20SSOP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheet
1.PIC16C554-04P.pdf
(108 pages)
Specifications of PIC16LC554-04E/SS
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Peripherals
POR, WDT
Number Of I /o
13
Program Memory Size
896B (512 x 14)
Program Memory Type
OTP
Ram Size
80 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
6.6
During an interrupt, only the return PC value is saved
on the stack. Typically, users may wish to save key reg-
isters during an interrupt (e.g., W register and STATUS
register). This will have to be implemented in software.
Example 6-1 stores and restores the STATUS and W
registers. The user register, W_TEMP, must be defined
in both banks and must be defined at the same offset
from the bank base address (i.e., W_TEMP is defined at
0x20 in Bank 0 and it must also be defined at 0xA0 in
Bank 1). The user register, STATUS_TEMP, must be
defined in Bank 0. The Example 6-1:
• Stores the W register
• Stores the STATUS register in Bank 0
• Executes the ISR code
• Restores the STATUS (and bank select bit
• Restores the W register
EXAMPLE 6-1:
2002 Microchip Technology Inc.
register)
MOVWF W_TEMP
SWAPF STATUS,W
BCF
MOVWF STATUS_TEMP
:
:
:
SWAPF STATUS_TEMP,W;swap STATUS_TEMP
MOVWF STATUS
SWAPF W_TEMP,F
SWAPF W_TEMP,W
Context Saving During Interrupts
STATUS,RP0
SAVING THE STATUS
AND W REGISTERS IN
RAM
;swap W_TEMP
;swap W_TEMP into W
;copy W to TEMP
;register, could be in
;either bank
;swap STATUS to be
;saved into W
;change to bank0
;regardless of
;current bank
;save STATUS to bank0
;register
;register into W, sets
;bank to original state
;move W into STATUS
;register
Preliminary
6.7
The Watchdog Timer is a free running on-chip RC oscil-
lator which does not require any external components.
This RC oscillator is separate from the RC oscillator of
the CLKIN pin. That means that the WDT will run, even
if the clock on the OSC1 and OSC2 pins of the device
has been stopped, for example, by execution of a
SLEEP
timeout generates a device RESET. If the device is in
SLEEP mode, a WDT timeout causes the device to
wake-up and continue with normal operation. The WDT
can be permanently disabled by programming the con-
figuration bit WDTE as clear (Section 6.1).
6.7.1
The WDT has a nominal timeout period of 18 ms, (with
no prescaler). The timeout periods vary with tempera-
ture, V
DC specs). If longer timeout periods are desired, a
prescaler with a division ratio of up to 1:128 can be
assigned to the WDT under software control by writing
to the OPTION register. Thus, timeout periods up to 2.3
seconds can be realized.
The
and the postscaler, if assigned to the WDT, and prevent
it from timing out and generating a device RESET.
The TO bit in the STATUS register will be cleared upon
a Watchdog Timer timeout.
6.7.2
It should also be taken in account that under worst case
conditions (V
WDT prescaler) it may take several seconds before a
WDT timeout occurs.
CLRWDT
DD
instruction. During normal operation, a WDT
Watchdog Timer (WDT)
and process variations from part-to-part (see
WDT PERIOD
WDT PROGRAMMING
CONSIDERATIONS
DD
and
= Min., Temperature = Max., max.
SLEEP
PIC16C55X
instructions clear the WDT
DS40143D-page 43