AT89C1051-24SC Atmel, AT89C1051-24SC Datasheet - Page 4

IC MCU 1KB FLASH 24MHZ 20-SOIC

AT89C1051-24SC

Manufacturer Part Number
AT89C1051-24SC
Description
IC MCU 1KB FLASH 24MHZ 20-SOIC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C1051-24SC

Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Peripherals
LED
Number Of I /o
15
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Connectivity
-
Other names
AT89C105124SC

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Special Function Registers
A map of the on-chip memory area called the Special Func-
tion Register (SFR) space is shown in the table below.
Note that not all of the addresses are occupied, and unoc-
cupied addresses may not be implemented on the chip.
Read accesses to these addresses will in general return
random data, and write accesses will have an indetermi-
nate effect.
User software should not write 1s to these unlisted loca-
tions, since they may be used in future products to invoke
new features. In that case, the reset or inactive values of
the new bits will always be 0.
Table 1. AT89C1051 SFR Map and Reset Values
4-6
0D8H
0D0H
0C8H
0C0H
0E8H
0E0H
0B8H
0B0H
0A8H
0A0H
0F8H
0F0H
98H
90H
88H
80H
XXX00000
0XX00000
00000000
00000000
00000000
11111111
11111111
00000000
TCON
PSW
ACC
P3
P1
IP
IE
B
AT89C1051
00000000
00000111
TMOD
SP
00000000
00000000
DPL
TL0
00000000
DPH
00000000
Restrictions on Certain Instructions
The AT89C1051 is an economical and cost-effective mem-
ber of Atmel’s growing family of microcontrollers. It con-
tains 1K byte of flash program memory. It is fully compati-
ble with the MCS-51 architecture, and can be programmed
using the MCS-51 instruction set. However, there are a
few considerations one must keep in mind when utilizing
certain instructions to program this device.
All the instructions related to jumping or branching should
be restricted such that the destination address falls within
the physical program memory space of the device, which is
1K for the AT89C1051. This should be the responsibility of
the software programmer. For example, LJMP 3FEH
would be a valid instruction for the AT89C1051 (with 1K of
memory), whereas LJMP 410H would not.
TH0
0XXX0000
PCON
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
87H

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