AT91M55800A-33CI Atmel, AT91M55800A-33CI Datasheet - Page 19

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AT91M55800A-33CI

Manufacturer Part Number
AT91M55800A-33CI
Description
IC ARM MCU 33MHZ 176-BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91M55800A-33CI

Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
58
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
176-LFBGA
For Use With
AT91EB55 - KIT EVAL FOR ARM AT91M55800A
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
AT91M55800A-33CI
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT91M55800A-33CI SL383
Manufacturer:
Atmel
Quantity:
10 000
8.1
8.1.1
8.1.2
8.1.3
8.1.4
1745FS–ATARM–18-Apr-06
System Peripherals
APMC: Advanced Power Management Controller
RTC: Real Time Clock
AIC: Advanced Interrupt Controller
PIO: Parallel I/O Controller
Most importantly, the PDC removes the processor interrupt handling overhead and signifi-
cantly reduces the number of clock cycles required for a data transfer. It can transfer up to 64K
contiguous bytes. As a result, the performance of the microcontroller is increased and the
power consumption reduced.
The AT91M55800A Advanced Power Management Controller allows optimization of power
consumption. The APMC enables/disables the clock inputs of most of the peripherals and the
ARM core. Moreover, the main oscillator, the PLL and the analog peripherals can be put in
standby mode allowing minimum power consumption to be obtained. The APMC provides the
following operating modes:
The AT91M55800A features a Real-time Clock (RTC) peripheral that is designed for very low
power consumption. It combines a complete time-of-day clock with alarm and a two-hundred
year Gregorian calendar, complemented by a programmable periodic interrupt.
The time and calendar values are coded in Binary-Coded Decimal (BCD) format. The time for-
mat can be 24-hour mode or 12-hour mode with an AM/PM indicator.
Updating time and calendar fields and configuring the alarm fields is performed by a parallel
capture on the 32-bit data bus. An entry control is performed to avoid loading registers with
incompatible BCD format data or with an incompatible date according to the current month/
year/century.
The AIC has an 8-level priority, individually maskable, vectored interrupt controller, and drives
the NIRQ and NFIQ pins of the ARM7TDMI from:
The AIC is largely programmable offering maximum flexibility, and its vectoring features
reduce the real-time overhead in handling interrupts.
The AIC also features a spurious vector, which reduces spurious interrupt handling to a mini-
mum, and a protect mode that facilitates the debug capabilities.
The AT91M55800A has 58 programmable I/O lines. 13 pins are dedicated as general-purpose
I/O pins. The other I/O lines are multiplexed with an external signal of a peripheral to optimize
the use of available package pins. The PIO lines are controlled by two separate and identical
• Normal mode: clock generator provides clock to the entire chip except the RTC.
• Wait mode: ARM core clock deactivated
• Slow Clock mode: clock generator deactivated, master clock 32 kHz
• Standby mode: RTC active, all other clocks disabled
• Power-down mode: RTC active, supply on the rest of the circuit deactivated
• The external fast interrupt line (FIQ)
• The six external interrupt request lines (IRQ0 - IRQ5)
• The interrupt signals from the on-chip peripherals
AT91M55800A Summary
19

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