T89C51RD2-SLSIM Atmel, T89C51RD2-SLSIM Datasheet - Page 54
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T89C51RD2-SLSIM
Manufacturer Part Number
T89C51RD2-SLSIM
Description
IC MICRO CTRL 64K FLASH 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet
1.T89C51RD2-SMSIM.pdf
(104 pages)
Specifications of T89C51RD2-SLSIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
SPI, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Flash Registers and
Memory Map
Flash Register
Hardware register
54
T89C51RD2
The bootloader and the In Application Programming (IAP) routines are located in the last
kilobyte of the Flash, leaving 63k bytes available for the application with ISP.
The T89C51RD2 Flash memory uses several registers for his management:
•
•
•
Figure 20. FCON register
FCON (S:D1h) Flash control register
Reset Value = xxxx 0000b
The Flash programming application note and API source code are available on request.
The only hardware register of the T89C51RD2 is called Hardware Security Byte (HSB).
After full Flash erasure, the content of this byte is FFh; each bit is active at low level.
Number
FPL3
these devices is similar to that used by EPROM 87C51 but it is not identical and the
commercially available programmers need to have support for the T89C51RD2.
Flash control register is used to select the Flash memory spaces and launch the
Flash programming sequence.
Hardware registers can only be accessed through the parallel programming modes
which are handled by the parallel programmer.
Software registers are in a special page of the Flash memory which can be
accessed through the API or with the parallel programming modes. This page,
called "Extra Flash Memory", is not in the internal Flash program memory
addressing space.
Bit
7-4
2-1
7
3
0
Mnemonic Description
FMOD1:0
FBUSY
FPL3:0
FPL2
FPS
Bit
6
Programming Launch command bits
Write 5h followed by Ah to launch the programming.
Flash Map Program Space
Clear to map the data space during MOVX
Set to map the Flash space during MOVX (write) or MOVC (read) instructions
(Write in the column latches)
Flash Mode
Select the addressed space
00: User (0000h-FFFFh)
01: XAF
10: Hardware byte
11: reserved
Flash Busy
Set by hardware when programming is in progress.
Clear by hardware when programming is done.
Can not be cleared by software
FPL1
5
FPL0
4
FPS
3
FMOD1
2
FMOD0
1
4243G–8051–05/03
FBUSY
0