ATMEGA162V-1AC Atmel, ATMEGA162V-1AC Datasheet - Page 106

• Manufacturer Part Number: ATMEGA162V-1AC
• Description: IC MCU AVR 16K 1.8V 8MHZ 44-TQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA162V-1AC

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: EBI/EMI, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-TQFP, 44-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Data Converters: -

Definitions
Compatibility
106
ATmega162(V/U/L)
(OCnA/B). See “Output Compare Units” on page 113. The compare match event will
also set the Compare Match Flag (OCFnA/B) which can be used to generate an output
compare interrupt request.
The Input Capture Register can capture the Timer/Counter value at a given external
(edge triggered) event on either the Input Capture pin (ICPn) or on the Analog Compar-
ator pins (See “Analog Comparator” on page 192.) The input capture unit includes a
digital filtering unit (Noise Canceler) for reducing the chance of capturing noise spikes.
The TOP value, or maximum Timer/Counter value, can in some modes of operation be
defined by either the OCRnA Register, the ICRn Register, or by a set of fixed values.
When using OCRnA as TOP value in a PWM mode, the OCRnA Register can not be
used for generating a PWM output. However, the TOP value will in this case be double
buffered allowing the TOP value to be changed in run time. If a fixed TOP value is
required, the ICRn Register can be used as an alternative, freeing the OCRnA to be
used as PWM output.
The following definitions are used extensively throughout the section:
Table 52. Definitions
The 16-bit Timer/Counter has been updated and improved from previous versions of the
16-bit AVR Timer/Counter. This 16-bit Timer/Counter is fully compatible with the earlier
version regarding:
•
•
•
The following control bits have changed name, but have same functionality and register
location:
•
•
•
The following bits are added to the 16-bit Timer/Counter Control Registers:
•
•
The 16-bit Timer/Counter has improvements that will affect the compatibility in some
special cases.
BOTTOM
MAX
TOP
All 16-bit Timer/Counter related I/O Register address locations, including Timer
Interrupt Registers.
Bit locations inside all 16-bit Timer/Counter Registers, including Timer Interrupt
Registers.
Interrupt Vectors.
PWMn0 is changed to WGMn0.
PWMn1 is changed to WGMn1.
CTCn is changed to WGMn2.
FOCnA and FOCnB are added to TCCRnA.
WGMn3 is added to TCCRnB.
The counter reaches the BOTTOM when it becomes 0x0000.
The counter reaches its MAXimum when it becomes 0xFFFF (decimal
65535).
The counter reaches the TOP when it becomes equal to the highest
value in the count sequence. The TOP value can be assigned to be one
of the fixed values: 0x00FF, 0x01FF, or 0x03FF, or to the value stored in
the OCRnA or ICRn Register. The assignment is dependent of the mode
of operation.
2513C–AVR–09/02