PIC16F874A-E/ML Microchip Technology, PIC16F874A-E/ML Datasheet - Page 157
PIC16F874A-E/ML
Manufacturer Part Number
PIC16F874A-E/ML
Description
IC MCU FLASH 4KX14 A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873A-ISO.pdf
(234 pages)
5.PIC16F873A-ISO.pdf
(6 pages)
6.PIC16F873A-ISO.pdf
(4 pages)
7.PIC16F873A-ISO.pdf
(6 pages)
8.PIC16F873A-ISO.pdf
(4 pages)
9.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F874A-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873A-ISO PDF datasheet #4
- PIC16F873A-ISO PDF datasheet #5
- PIC16F873A-ISO PDF datasheet #6
- PIC16F873A-ISO PDF datasheet #7
- PIC16F873A-ISO PDF datasheet #8
- PIC16F873A-ISO PDF datasheet #9
- Current page: 157 of 234
- Download datasheet (5Mb)
14.13 Watchdog Timer (WDT)
The Watchdog Timer is a free running, on-chip RC
oscillator which does not require any external
components. This RC oscillator is separate from the
RC oscillator of the OSC1/CLKI pin. That means that
the WDT will run even if the clock on the OSC1/CLKI
and OSC2/CLKO pins of the device has been stopped,
for example, by execution of a SLEEP instruction.
During normal operation, a WDT time-out generates a
device Reset (Watchdog Timer Reset). If the device is
in Sleep mode, a WDT time-out causes the device to
wake-up and continue with normal operation (Watch-
dog Timer Wake-up). The TO bit in the Status register
will be cleared upon a Watchdog Timer time-out.
The WDT can be permanently disabled by clearing
configuration bit, WDTE (Section 14.1 “Configuration
Bits”).
FIGURE 14-11:
TABLE 14-7:
2003 Microchip Technology Inc.
2007h
81h, 181h
Legend: Shaded cells are not used by the Watchdog Timer.
Note 1:
Address
See Register 14-1 for operation of these bits.
Config. bits
OPTION_REG
Name
SUMMARY OF WATCHDOG TIMER REGISTERS
Note:
WDT Timer
Enable Bit
WDT
WATCHDOG TIMER BLOCK DIAGRAM
PSA and PS2:PS0 are bits in the OPTION_REG register.
From TMR0 Clock Source
(Figure 5-1)
RBPU
Bit 7
(1)
BODEN
INTEDG
0
1
Bit 6
PSA
M
U
X
(1)
T0CS
Bit 5
CP1
0
WDT time-out period values may be found in
Section 17.0 “Electrical Characteristics” under
parameter #31. Values for the WDT prescaler (actually
a postscaler but shared with the Timer0 prescaler) may
be assigned using the OPTION_REG register.
T0SE
Bit 4
CP0
Time-out
MUX
8-to-1 MUX
WDT
Note 1: The CLRWDT and SLEEP instructions
Postscaler
1
2: When a CLRWDT instruction is executed
8
PWRTE
Bit 3
clear the WDT and the postscaler, if
assigned to the WDT and prevent it from
timing out and generating a device Reset
condition.
and the prescaler is assigned to the WDT,
the prescaler count will be cleared but the
prescaler assignment is not changed.
PSA
PSA
To TMR0 (Figure 5-1)
(1)
PIC16F87XA
PS2:PS0
WDTE
Bit 2
PS2
F
Bit 1
DS39582B-page 155
PS1
OSC
1
F
Bit 0
PS0
OSC
0
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