PIC16F874A-E/ML Microchip Technology, PIC16F874A-E/ML Datasheet - Page 166
PIC16F874A-E/ML
Manufacturer Part Number
PIC16F874A-E/ML
Description
IC MCU FLASH 4KX14 A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16F688T-ISL.pdf
(688 pages)
3.PIC16C770-ISO.pdf
(8 pages)
4.PIC16F873A-ISO.pdf
(234 pages)
5.PIC16F873A-ISO.pdf
(6 pages)
6.PIC16F873A-ISO.pdf
(4 pages)
7.PIC16F873A-ISO.pdf
(6 pages)
8.PIC16F873A-ISO.pdf
(4 pages)
9.PIC16F873A-ISO.pdf
(22 pages)
Specifications of PIC16F874A-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC16F688T-ISL PDF datasheet #2
- PIC16C770-ISO PDF datasheet #3
- PIC16F873A-ISO PDF datasheet #4
- PIC16F873A-ISO PDF datasheet #5
- PIC16F873A-ISO PDF datasheet #6
- PIC16F873A-ISO PDF datasheet #7
- PIC16F873A-ISO PDF datasheet #8
- PIC16F873A-ISO PDF datasheet #9
- Current page: 166 of 234
- Download datasheet (5Mb)
PIC16F87XA
RLF
Syntax:
Operands:
Operation:
Status Affected:
Description:
RETURN
Syntax:
Operands:
Operation:
Status Affected:
Description:
RRF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DS39582B-page 164
Rotate Left f through Carry
[ label ] RLF
0
d
See description below
C
The contents of register ‘f’ are
rotated one bit to the left through the
Carry flag. If ‘d’ is ‘0’, the result is
placed in the W register. If ‘d’ is ‘1’,
the result is stored back in register ‘f’.
Rotate Right f through Carry
[ label ]
0
d
See description below
C
The contents of register ‘f’ are
rotated one bit to the right through
the Carry flag. If ‘d’ is ‘0’, the
result is placed in the W register.
If ‘d’ is ‘1’, the result is placed
back in register ‘f’.
Return from Subroutine
[ label ]
None
TOS
None
Return from subroutine. The stack
is POPed and the top of the stack
(TOS) is loaded into the program
counter. This is a two-cycle
instruction.
f
f
[0,1]
[0,1]
127
127
C
PC
C
RETURN
RRF f,d
f,d
Register f
Register f
SLEEP
Syntax:
Operands:
Operation:
Status Affected:
Description:
SUBLW
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
SUBWF
Syntax:
Operands:
Operation:
Status
Affected:
Description:
Subtract W from f
[ label ] SUBWF f,d
0
d
(f) - (W)
C, DC, Z
Subtract (2’s complement method)
W register from register ‘f’. If ‘d’ is
‘0’, the result is stored in the W
register. If ‘d’ is ‘1’, the result is
stored back in register ‘f’.
[ label ] SUBLW k
0
k - (W)
The W register is subtracted (2’s
complement method) from the
eight-bit literal ‘k’. The result is
placed in the W register.
Subtract W from Literal
[ label ] SLEEP
None
00h
0
1
0
TO, PD
The power-down status bit, PD,
is cleared. Time-out status bit,
TO, is set. Watchdog Timer and
its prescaler are cleared.
The processor is put into Sleep
mode with the oscillator stopped.
f
k
[0,1]
2003 Microchip Technology Inc.
127
WDT prescaler,
TO,
PD
255
WDT,
W)
destination)
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